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24C01 Datasheet(PDF) 5 Page - ATMEL Corporation |
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24C01 Datasheet(HTML) 5 Page - ATMEL Corporation |
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5 / 10 page ![]() AT24C01 5 Bus Timing SCL: Serial Clock, SDA: Serial Data I/O Write Cycle Timing SCL: Serial Clock, SDA: Serial Data I/O Note: 1. The write cycle time t WR is the time from a valid stop condition of a write sequence to the end of the internal clear/write cycle. SCL SDA WORD n 8th BIT ACK STOP CONDITION START CONDITION t WR (1) |
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