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INTERRUPT HANDLING FOR STR7 MICROCONTROLLERS

Figure 1. Interrupt Handling

6.5 EIC INITIALIZATION

The EIC initialization depends on the used EIC method. Source files are provided with this ap-

plication note for the address method, Branch method and LDR PC method. The following top

level assembler example shows how to configure the EIC for the LDR PC method.

;*******************************************************************************

;

Exception vectors

;*******************************************************************************

LDR

PC, Reset_Addr

LDR

PC, Undefined_Addr

LDR

PC, SWI_Addr

LDR

PC, Prefetch_Addr

LDR

PC, Abort_Addr

NOP

; Reserved vector

LDR

PC, IRQ_Addr

user program

’SYS/USR mode’

Instruction

IRQHandler

’IRQ mode’

subtract 4 from lr_irq

Save r[0:12] lr_irq and

spsr_irq registers

Execute the instruction

located in IVR

TIM0IRQHandler

Switch to SYS mode to

allow other IRQ interrupts

Branch with link to

TIM0_IRQHandler

Switch to IRQ mode

TIM0 IRQ handler C code

TIM0_IRQHandler

’SYS mode’

Get the current IRQ

channel number

Clear the pending bit

Restore spsr_irq

Restore r[0:12] regis-

ters and lr_irq

cpsr <- spsr_irq

IRQ

request

71x_vect.s

71x_it.c

LDR pc,TIM0_IRQAddress

IVR

Instruction

Instruction

LDR pc,IRQ_Addr

0x18