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PEX8608 Datasheet(PDF) 3 Page - AVAGO TECHNOLOGIES LIMITED |
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PEX8608 Datasheet(HTML) 3 Page - AVAGO TECHNOLOGIES LIMITED |
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3 / 4 page ![]() Control Plane Application The PEX 8608 is ideal for control planes in routers and other communications sub-systems to meet increased packet processing needs without compromising latency. Figure 3 shows a controller card with a PEX 8608 connecting the Control Processor to as many as seven line cards each via an x1 connection. This usage model provides connectivity to multiple line cards giving the processor control over a large number of line cards in communication platforms. Figure 3. Control Plane Application Control Planes for Large Systems Two PEX 8608 devices can be used in applications where there is need for more than 7 line cards and the processor has 2 PCIe ports. An example of a control plane application with more than 7 line cards is shown in Figure 4. Figure 4. Control Planes for Large Systems Embedded Control Planes The PEX 8608 is well suited for embedded control plane applications. An example of such application is a packet processing module, as shown in Figure 5. In this example, the FPGAs and ASICs implement an x1 PCI Express Interface. With its high port count, the PEX 8608 can provide connectivity to a high number of FPGAs and ASICs for a robust packet processing communications sub-system. Figure 5. Packet Processing Module Intelligent Adapter Card The PEX 8608 supports the non-transparency feature. Figure 6 illustrates a host system using an intelligent adapter card. Figure 6. Intelligent Adapter Usage In this figure, the CPU on the Mezzanine card is isolated from the host CPU. The PEX 8608 non-transparent port allows the two CPUs to be isolated but communicate with each other through various registers that are designed in the PEX 8608 for that purpose. The host CPU can dynamically re-assign both the upstream port and the non-transparent port of PEX 8608 allowing the system to be reconfigured. Active-Standby Failover Model The PEX 8608 supports applications requiring dual host, host failover applications through the non-transparency feature. Figure 7 illustrates a dual host system with an active and standby processor configuration. The redundancy of the host and the fabric can be achieved through many possible configurations using NTB function of PEX 8608. In the configuration shown below Processor A is the primary active host of the PCI Express system. Processor B acts as the backup Host. In the case of a failure on Processor A, application software is instructed to migrate the PCI Express system to Processor B. Consequently, Processor B becomes the active host and Processor A can be replaced as the backup Host. Figure 7. Active-Standby Host Mode |
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