TM3IO datasheet(2/25 Pages) PANASONIC

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MN103SFM9K

32-bit Single-chip Microcontroller

Publication date: August 2014

PubNo. 232M9-010E

1.2

Hardware Functions

CPU Core

MN103S core

4 GB of linear address space (for instructions / data)

LOAD/STORE architecture with 5-stage pipeline

46 basic instructions + 4 extension instructions

6 addressing modes

Instruction set of 1 byte in word length

Machine cycle: 16.7 ns (oscillation frequency: 10 MHz, 6 multiply)

Operation mode: Normal mode

Oscillation Circuit

External high-speed oscillation (crystal/ ceramic)

Clock Multiplication Circuit

External high-speed oscillation is multiplied by 4, 6 and 8.

Operating voltage

3.6 V to 5.5 V

Guaranteed operating temperature

-40

°C to 85 °C

Internal Memory

ROM 256 Kbytes

RAM 8 Kbytes

Interrupts

Non-maskable interrupt:

Watchdog timer overflow interrupts, System error interrupts

Internal interrupts:

47 interrupts

Timer 0 underflow interrupts

Timer 1 underflow interrupts

Timer 2 underflow interrupts

Timer 3 underflow interrupts

Timer 4 underflow interrupts

Timer 5 underflow interrupts

Timer 6 underflow interrupts

Timer 7 underflow interrupts

Timer 8 overflow/underflow interrupts

Timer 8 compare/capture A interrupts

Timer 8 compare/capture B interrupts

Timer 9 overflow/underflow interrupts

Timer 9 compare/capture A interrupts

Timer 9 compare/capture B interrupts

Timer 10 overflow/underflow interrupts

Timer 10 compare/capture A interrupts

Timer 10 compare/capture B interrupts

Timer 11 overflow/underflow interrupts

Timer 11 compare/capture A interrupts

Timer 11 compare/capture B interrupts

Timer 12 overflow/underflow interrupts

Timer 12 compare/capture A interrupts

Timer 12 compare/capture B interrupts

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