L2G3IS datasheet(19/26 Pages) STMICROELECTRONICS

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L2G3IS

7.5

CTRL_REG2 (0Ch)

7.6

CTRL_REG3 (0Dh)

Table 13. CTRL_REG1 description

BDU

Block data update. Default value: 0.

(0: output registers not updated until MSB and LSB have been read;

1: output registers updated continuously)

REG_EN

Enables writing to CTRL_REG4 (15h), CTRL_REG5 (1Fh) and CTRL_TEMP

(20h). Default value: 0

(1: enable write values in CTRL_REG4 (15h), CTRL_REG5 (1Fh)) and CTRL_-

TEMP (20h))

PW[1:0]

Operating mode selection. Default: 01.

Refer to Table 14: Operating mode selection.

Table 14. Operating mode selection

PW1

PW0

Operating mode selection

Power-down

Sleep mode

Normal mode

Table 15. CTRL_REG2 register

0(1)

1. These bits must be set to ‘0’ for proper operation of the device.

0(1)

HPFreset0 HPFreset1

0(1)

SWreset

HPF

Table 16. CTRL_REG2 description

HPFreset0

High-pass filter reset. Default: 0

To reset the HPF, HPFreset1 or HPFreset0 has to be set to 1.

(1: HPF reset on X-axis and Y-axis)

HPFreset1

High-pass filter reset. Default: 0

To reset the HPF, HPFreset1 or HPFreset0 has to be set to 1.

(1: HPF reset on X-axis and Y-axis)

SWreset

Software reset. Default: 0.

(1: all control and output register values are restored to default values).

HPF

High-pass filter enable. Default: 0.

(0: high-pass filter is disabled; 1: high-pass filter is enabled)

Table 17. CTRL_REG3 register

0(1)

1. These bits must be set to ‘0’ for proper operation of the device.

0(1)

LPF

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