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KTS6027-2 Datasheet(PDF) 31 Page - Infineon Technologies AG |
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KTS6027-2 Datasheet(HTML) 31 Page - Infineon Technologies AG |
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31 / 41 page ![]() Reference 5 - 31 KTS6027-2, KTS6029-2 Wireless Components Specification, July 2001 5.2 Programming Table 5-4 Bit Allocation Read / Write Byte MSB bit6 bit5 bit4 bit3 bit2 bit1 LSB Ack Write Data Address Byte 11 00 0MA1 MA0 0 A Progr. Divider Byte 1 0N14 N13 N12 N11 N10 N9 N8 A Progr. Divider Byte 2 N7 N6 N5 N4 N3 N2 N1 N0 A Control Byte 1CP T1 T0 CM RSA RSB OS A Bandswitch Byte 1). xx xx P3 P2 P1 P0 A Read Data Address Byte 11 00 0MA1 MA0 1 A Status Byte POR FL xx xA2 A1 A0 A 1). see Table 5-10 Bandswitching on page 33 Table 5-5 Description of symbols Symbol Description MA0, MA1 Address selection bits (see Table 5-6 Address selection on page 32) N14 to N0 programmable divider bits: N = 214 x N14 + 213 x N13 + ..... + 23 x N3 + 22 x N2 + 21 x N1 + N0 CP charge pump current: bit = 0: charge pump current = 50 µA bit = 1: charge pump current = 250µA T1, T0 test bits (see Table 5-7 Test modes on page 32) CM charge pump mode bit (see Table 5-9 Charge pump current on page 33) RSA, RSB reference divider bits (see Table 5-8 Reference divider ratio on page 32) OS tuning amplifier control bit: bit = 0: enable VT bit = 1: disable VT PLOW, PMID, PHIGH, PFM, see 5-10 on page 33 NPN ports control bits: bit = 0: NPN open-collector output is inactive bit = 1: NPN open-collector output is active A0, A1, A2 ADC bits (see Table 5-11 A/D converter levels on page 34) FL PLL lock flag bit = 1: loop is locked POR Power-on reset flag flag is set at power-on and reset at the end of READ operation x don‘t care |
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