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SP703EN Datasheet(PDF) 13 Page - Sipex Corporation |
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SP703EN Datasheet(HTML) 13 Page - Sipex Corporation |
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13 / 16 page ![]() SP703/704DS/07 SP703/704 Low Power Microprocessor Supervisory © Copyright 2000 Sipex Corporation 13 Interfacing to Microprocessors with Bidirectional Reset Pins Microprocessors with bidirectional reset pins, such as the Motorola 68HC11 series, can contend with this series' RESET output. If, for example, the RESET output is driven high and the µP wants to pull it low, indeterminate logic levels may result. To correct this, connect a 4.7K Ω resistor between the RESET output and the µP reset I/O, as in Figure 16. Buffer the RESET output to other system components. Figure 15. Monitoring a Negative Voltage Figure 16. Interfacing to Microprocessors with Bidirectional RESET I/O PFI PFO R2 R1 VCC +5V GND PFO V- +5V *VTRIP 0V 0V 5.0 - 1.25 R1 1.25 - VTRIP R2 V- = *VTRIP is a negative voltage VCC +5V GND VCC +5V GND RESET RESET 4.7K Ω µP Buffered RESET connects to System Components |
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