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AT89C51ED2-RDTIM Datasheet(PDF) 4 Page - ATMEL Corporation |
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AT89C51ED2-RDTIM Datasheet(HTML) 4 Page - ATMEL Corporation |
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4 / 24 page  AT89C51RD2 / AT89C51ED2 QualPack 4 Rev. 0 – 2003 July 3 Technology Information 3.1 Wafer Process Technology Process Type (Name): Logic 0.35um with embedded FLASH (AT56800) Base Material: Epitaxied Silicon Wafer Thickness (final) 475 um Wafer Diameter 150 mm Number Of Masks 27 Gate Oxide (Logic transistors) Material Silicon Dioxide Thickness 68A Gate Oxide (EPROM cell) Material Silicon Dioxide Thickness 390A Polysilicon Number of Layers 2 Thickness Poly 1 1400A Amorphous Thickness Poly 2 3200A Metal Number of Layers 3 Material: Aluminum Copper Layer 1 Thickness 5000A Layer 2 Thickness 5000A Layer 3 Thickness 8000A Passivation Material Oxide HDP/ Oxy-nitride Thickness 21000A |
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