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M38B53M4-059FP Datasheet(PDF) 10 Page - Mitsubishi Electric Semiconductor

Part # M38B53M4-059FP
Description  8-BIT SINGLE-CHIP MICROCOMPUTER
PDF  355 Pages
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Manufacturer  MITSUBISHI [Mitsubishi Electric Semiconductor]
Direct Link  http://www.mitsubishichips.com
Logo MITSUBISHI - Mitsubishi Electric Semiconductor

M38B53M4-059FP Datasheet(HTML) 10 Page - Mitsubishi Electric Semiconductor

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38B5 Group User’s Manual
List of figures
Fig. 2.2.2 Structure of Timer i (i=1, 3, 4, 5, 6) ....................................................................... 2-11
Fig. 2.2.3 Structure of Timer 2 .................................................................................................. 2-11
Fig. 2.2.4 Structure of Timer 6 PWM register ......................................................................... 2-11
Fig. 2.2.5 Structure of Timer 12 mode register ....................................................................... 2-12
Fig. 2.2.6 Structure of Timer 34 mode register ....................................................................... 2-12
Fig. 2.2.7 Structure of Timer 56 mode register ....................................................................... 2-13
Fig. 2.2.8 Structure of Timer X (low-order, high-order) .......................................................... 2-13
Fig. 2.2.9 Structure of Timer X mode register 1 ..................................................................... 2-14
Fig. 2.2.10 Structure of Timer X mode register 2 ................................................................... 2-15
Fig. 2.2.11 Structure of Interrupt request register 1 ............................................................... 2-16
Fig. 2.2.12 Structure of Interrupt request register 2 ............................................................... 2-17
Fig. 2.2.13 Structure of Interrupt control register 1 ................................................................ 2-18
Fig. 2.2.14 Structure of Interrupt control register 2 ................................................................ 2-18
Fig. 2.2.15 Timers connection and setting of division ratios ................................................. 2-20
Fig. 2.2.16 Relevant registers setting ....................................................................................... 2-21
Fig. 2.2.17 Control procedure ..................................................................................................... 2-22
Fig. 2.2.18 Peripheral circuit example ....................................................................................... 2-23
Fig. 2.2.19 Timers connection and setting of division ratios ................................................. 2-23
Fig. 2.2.20 Relevant registers setting ....................................................................................... 2-24
Fig. 2.2.21 Control procedure ..................................................................................................... 2-24
Fig. 2.2.22 Judgment method of valid/invalid of input pulses ............................................... 2-25
Fig. 2.2.23 Relevant registers setting ....................................................................................... 2-26
Fig. 2.2.24 Control procedure ..................................................................................................... 2-27
Fig. 2.2.25 Timers connection and setting of division ratios ................................................. 2-28
Fig. 2.2.26 Relevant registers setting ....................................................................................... 2-29
Fig. 2.2.27 Control procedure ..................................................................................................... 2-30
Fig. 2.2.28 Timers connection and table example of timer X/RTP setting values ............. 2-32
Fig. 2.2.29 RTP output example ................................................................................................ 2-32
Fig. 2.2.30 Relevant registers setting ....................................................................................... 2-33
Fig. 2.2.31 Control procedure ..................................................................................................... 2-34
Fig. 2.3.1 Memory map of registers relevant to Serial I/O .................................................... 2-35
Fig. 2.3.2 Structure of Serial I/O1 automatic transfer data pointer ...................................... 2-36
Fig. 2.3.3 Structure of Serial I/O1 control register 1 .............................................................. 2-37
Fig. 2.3.4 Structure of Serial I/O1 control register 2 .............................................................. 2-38
Fig. 2.3.5 Structure of Serial I/O1 register/Transfer counter ................................................. 2-39
Fig. 2.3.6 Structure of Serial I/O1 control register 3 .............................................................. 2-40
Fig. 2.3.7 Structure of Baud rate generator ............................................................................. 2-41
Fig. 2.3.8 Structure of UART control register .......................................................................... 2-41
Fig. 2.3.9 Structure of Serial I/O2 control register.................................................................. 2-42
Fig. 2.3.10 Structure of Serial I/O2 status register ................................................................. 2-43
Fig. 2.3.11 Structure of Serial I/O2 transmit/receive buffer register ..................................... 2-43
Fig. 2.3.12 Structure of Interrupt source switch register ........................................................ 2-44
Fig. 2.3.13 Structure of Interrupt request register 1 ............................................................... 2-44
Fig. 2.3.14 Structure of Interrupt request register 2 ............................................................... 2-45
Fig. 2.3.15 Structure of Interrupt control register 1 ................................................................ 2-46
Fig. 2.3.16 Structure of Interrupt control register 2 ................................................................ 2-46
Fig. 2.3.17 Serial I/O1 connection examples (1) ..................................................................... 2-47
Fig. 2.3.18 Serial I/O1 connection examples (2) ..................................................................... 2-48
Fig. 2.3.19 Serial I/O1’s modes ................................................................................................. 2-49
Fig. 2.3.20 Connection diagram ................................................................................................. 2-50
Fig. 2.3.21 Timing chart .............................................................................................................. 2-50



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