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M38B53M4-059FP Datasheet(PDF) 234 Page - Mitsubishi Electric Semiconductor |
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M38B53M4-059FP Datasheet(HTML) 234 Page - Mitsubishi Electric Semiconductor |
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234 / 355 page ![]() 2-146 38B5 Group User’s Manual APPLICATION 2.8 Watchdog timer Fig. 2.8.5 Control procedure 2.8.4 Notes on use q The watchdog timer continues to count even while waiting for stop release. Accordingly, make sure that watchdog timer does not underflow during this term by writing to the watchdog timer control register (address 002B16) once before executing the STP instruction, etc. q Once a “1” is written to the STP instruction disable bit (bit 6) of the watchdog timer control register (address 002B16), it cannot be programmed to “0” again. This bit becomes “0” after reset. Figure 2.8.5 shows the control procedure. Initialization SEI CLT CLD CPUM (address 003B16) 000XXX002 Main processing RESET CPU mode register setting (single-chip mode, main clock oscillating, high-speed mode) WDTCON (address 002B16) 00XXXXXX2 Count of watchdog timer start (STP instruction enabled, WDTH count source) CLI qX: This bit is not used here. Set it to “0” or “1” arbitrarily. |
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