DA7211 datasheet(39/105 Pages) DIALOG

39 / 105 page

DA7211

Ultra-low power stereo codec

Company confidential

Datasheet

Revision 3e

15-Oct-2015

CFR0011-120-00 Rev 5

39 of 105

8.3

Programming the general purpose filter

The general purpose filter is configured using two groups of registers. These are coefficient

programming and path selection. The coefficients should be programmed using the registers

GP1A_A0L (address 0x2D, Table 80) to GP2D_B2H (address 0x7C, Table 159). Coefficients are

programmed as two 8-bit registers of signed values representing the range +2 to -2.

Example

GP1A_B1L and GP1A_B1H contain the two’s complement low and high bytes of the -b1 coefficient

of the filter illustrated in Figure 16. If a coefficient value of 1.45 is required, -b1 is programmed as the

coefficient number multiplied by a scaling factor.

The scaling factor 214 is used to convert the floating point number into an integer value for

programming. The low byte will always be an 8-bit unsigned hexadecimal value, while the high byte

contains the sign bit of the two’s complement word.

Scale the unsigned decimal coefficient value:

b1 = 1.45 x 214 = 23756.8 ≈ 23757

The unsigned scaled value in binary:

b1 = 0101110011001100b

Convert to two’s complement; invert the binary value and add the MSB sign bit:

b1 = 10100011001100112 = A333h

GP1A_B1L = 33h = 00110011

GP1A_B1H = A3h = 10100011, where MSB is the two’s complement sign-bit

Note that the denominator coefficient is explicitly negated. The value of the -b1 term is positive, so a

negative value must be programmed. There are eight fully programmable, second-order IIR biquad

filter sections grouped in the following pairs:

● 1AB

● 1CD

● 2AB

● 2CD

The output of the first section in each group is cascaded with the second section. The filter sections

are processed in a fixed order: 1A, 1B, 1C, 1D, 2A, 2B, 2C, 2D.

Each filter group can be programmed to take its input from one of seven possible sources, that is,

from either an ADC or an I2S channel, or from any filter section that has been previously processed

using GP_1AB_SRC and GP_2AB_SRC (address 0x7D, Table 160) and GP_1CD_SRC and

GP_2CD_SRC (address 0x7E, Table 161) It is possible to cascade all eight GP filters together using

these registers. Each filter block can be enabled or disabled in register DSP_CFG (address 0x7F,

Table 162).

Table 23: GP filter section enable bits

Control

Definition

GP1AB_EN

Enable GP section 1AB

GP1CD_EN

Enable GP section 1CD

GP2AB_EN

Enable GP section 2AB

GP2CD_EN

Enable GP section 2CD

The outputs of some groups can be summed together, as controlled by register DSP_CFG (address

0x7F, Table 162).

DA7211 Datasheet(PDF) 39 Page - Dialog Semiconductor

DA7211 Datasheet(HTML) 39 Page - Dialog Semiconductor

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL