DS2155 datasheet(4/262 Pages) DALLAS

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DS2156

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17.

CHANNEL BLOCKING REGISTERS ..................................................................................................107

18.

ELASTIC STORES OPERATION..........................................................................................................110

18.1

RECEIVE SIDE ..........................................................................................................................................113

18.1.1

T1 Mode ..............................................................................................................................................113

18.1.2

E1 Mode..............................................................................................................................................113

18.2

TRANSMIT SIDE .......................................................................................................................................113

18.2.1

T1 Mode ..............................................................................................................................................114

18.2.2

E1 Mode..............................................................................................................................................114

18.3

ELASTIC STORES INITIALIZATION ...........................................................................................................114

TABLE 18-A. ELASTIC STORE DELAY AFTER INITIALIZATION.............................................................................114

18.4

MINIMUM DELAY MODE .........................................................................................................................114

19.

G.706 INTERMEDIATE CRC-4 UPDATING (E1 MODE ONLY).....................................................115

FIGURE 19-1. CRC-4 RECALCULATE METHOD ....................................................................................................115

20.

T1 BIT-ORIENTED CODE (BOC) CONTROLLER............................................................................116

20.1

TRANSMIT BOC.......................................................................................................................................116

Transmit a BOC ................................................................................................................................................116

20.2

RECEIVE BOC .........................................................................................................................................116

Receive a BOC ..................................................................................................................................................116

21.

ADDITIONAL (SA) AND INTERNATIONAL (SI) BIT OPERATION (E1 ONLY) ........................119

21.1

METHOD 1: HARDWARE SCHEME ...........................................................................................................119

21.2

METHOD 2: INTERNAL REGISTER SCHEME BASED ON DOUBLE-FRAME ................................................119

21.3

METHOD 3: INTERNAL REGISTER SCHEME BASED ON CRC4 MULTIFRAME..........................................122

22.

HDLC CONTROLLERS..........................................................................................................................132

22.1

BASIC OPERATION DETAILS....................................................................................................................132

22.2

HDLC CONFIGURATION..........................................................................................................................132

TABLE 22-A. HDLC CONTROLLER REGISTERS ....................................................................................................133

22.2.1

FIFO Control......................................................................................................................................136

22.3

HDLC MAPPING......................................................................................................................................137

22.3.1

Receive................................................................................................................................................137

22.3.2

Transmit..............................................................................................................................................139

22.3.3

FIFO Information ...............................................................................................................................144

22.3.4

Receive Packet-Bytes Available..........................................................................................................144

22.3.5

HDLC FIFOs ......................................................................................................................................145

22.4

RECEIVE HDLC CODE EXAMPLE............................................................................................................146

22.5

LEGACY FDL SUPPORT (T1 MODE)........................................................................................................146

22.5.1

Overview .............................................................................................................................................146

22.5.2

Receive Section ...................................................................................................................................146

22.5.3

Transmit Section .................................................................................................................................148

22.6

D4/SLC-96 OPERATION ..........................................................................................................................148

23.

LINE INTERFACE UNIT (LIU) .............................................................................................................149

23.1

LIU OPERATION ......................................................................................................................................149

23.2

RECEIVER ................................................................................................................................................149

23.2.1

Receive Level Indicator and Threshold Interrupt...............................................................................150

23.2.2

Receive G.703 Synchronization Signal (E1 Mode).............................................................................150

23.2.3

Monitor Mode .....................................................................................................................................150

FIGURE 23-1. TYPICAL MONITOR APPLICATION...................................................................................................150

23.3

TRANSMITTER .........................................................................................................................................151

23.3.1

Transmit Short-Circuit Detector/Limiter............................................................................................151

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