LAN8741AI-EN datasheet(27/106 Pages) MICROCHIP

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DS00001988A-page 27

LAN8741A/LAN8741Ai

3.5

Serial Management Interface (SMI)

The Serial Management Interface is used to control the device and obtain its status. This interface supports registers 0

through 6 as required by clause 22 of the 802.3 standard, as well as “vendor-specific” registers 16 to 31 allowed by the

specification. Device registers are detailed in Chapter 4, "Register Descriptions".

At the system level, SMI provides 2 signals: MDIO and MDC. The MDC signal is an aperiodic clock provided by the

Station Management Controller (SMC). MDIO is a bi-directional data SMI input/output signal that receives serial data

(commands) from the controller SMC and sends serial data (status) to the SMC. The minimum time between edges of

the MDC is 160 ns. There is no maximum time between edges. The minimum cycle time (time between two consecutive

rising or two consecutive falling edges) is 400 ns. These modest timing requirements allow this interface to be easily

driven by the I/O port of a microcontroller.

The data on the MDIO line is latched on the rising edge of the MDC. The frame structure and timing of the data is shown

in Figure 3-5 and Figure 3-6. The timing relationships of the MDIO signals are further described in Section 5.6.5, "SMI

Timing".

FIGURE 3-5:

MDIO TIMING AND FRAME STRUCTURE - READ CYCLE

FIGURE 3-6:

MDIO TIMING AND FRAME STRUCTURE - WRITE CYCLE

MDC

MDIO

Read Cycle

...

32 1's

0110

A4 A3 A2 A1 A0 R4 R3 R2 R1 R0

...

D15 D14

Preamble

Start of

Frame

Code

PHY Address

Turn

Around

Data

Data From Phy

Data To Phy

MDC

MDIO

...

32 1's

A4A3A2A1A0 R4 R3 R2 R1 R0

Write Cycle

D15 D14

...

Data

Preamble

Start of

Frame

Code

PHY Address

Turn

Around

Data To Phy

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