LTM8049 datasheet(7/18 Pages) LINEAR

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LTM8049

8049f

For more information www.linear.com/LTM8049

TYPICAL PERFORMANCE CHARACTERISTICS

CLKOUT2 Duty Cycle

vs Temperature

Output Ripple, DC2244A Board

800mA Load, 12VIN

Measured Across C5, C6

fSW = 1MHz

TEMPERATURE (°C)

–50 –25

100 125

8049 G28

PIN FUNCTIONS

GND (Bank 1): Tie these GND pins to a local ground plane

below the LTM8049 and the circuit components. GND

MUST BE CONNECTED EITHER TO VOUTP OR VOUTN FOR

PROPER OPERATION. In most applications, the bulk of

the heat flow out of the LTM8049 is through these pads,

so the printed circuit design has a large impact on the

thermal performance of the part. See the PCB Layout and

Thermal Considerations sections for more details. Return

the feedback divider (RFB) to this net.

VIN1, VIN2 (Banks 2, 3): The VINn pins supply current to

the LTM8049’s internal regulator and to the internal power

switch. This pin must be locally bypassed with an external,

low ESR capacitor.

VOUT1P, VOUT2P (Banks 4, 5): VOUTnP is the positive out-

put of the LTM8049. Apply an external capacitor between

VOUTnP and VOUTnN. Tie this net to GND to configure the

LMT8049 as a negative output Inverting regulator.

VOUT1N, VOUT2N (Banks 6, 7): VOUTnN is the negative out-

put of the LTM8049. Apply an external capacitor between

VOUTnP and VOUTnN. Tie this net to GND to configure the

LTM8049 as a positive output SEPIC regulator.

RUN1,RUN2(PinsB7,K7):Thesepinsareusedtoenable/

disable the chip and restart the soft-start sequence. Drive

below 1.21V to stop the LTM8049 from switching. Drive

above 1.4V to activate the device and restart the soft-start

sequence. Do not float this pin.

RT1, RT2 (Pins E7, G7): The RTn pins are used to program

the switching frequency of the LTM8049 by connecting a

resistor from this pin to ground. The switching frequency

of the LTM8049 is determined by the equation RTn =

(81.6/fOSC)-1,wherethefOSCistheswitchingfrequencyin

MHz. This pin must have a resistor to GND. Do not apply

a voltage to this pin.

SS1, SS2 (Pins C7, J7): Connect a soft-start capacitor

from this pin to GND. Upon start-up, the SSn pins will be

charged by an internal current source to about 2V.

SYNC1, SYNC2 (Pins D7, H7): To synchronize the switch-

ingfrequencytoanoutsideclock,simplydrivethispinwith

a clock signal. The high voltage level of the clock needs

to exceed 1.3V, and the low level must be less than 0.4V.

Drive this pin to less than 0.4V to revert to the internal

free running clock. Ground these pins if synchronization

is not required. See the Applications Information section

for more information.

500ns/DIV

12VOUT

50mV/DIV

–12VOUT

20mV/DIV

8049 G29

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