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LTM8049 Datasheet(PDF) 13 Page - Linear Integrated Systems

Part # LTM8049
Description  Dual SEPIC or Inverting Module DC DC Converter
PDF  18 Pages
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Manufacturer  LINEAR [Linear Integrated Systems]
Direct Link  http://www.linearsystems.com
Logo LINEAR - Linear Integrated Systems

LTM8049 Datasheet(HTML) 13 Page - Linear Integrated Systems

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LTM8049
13
8049f
For more information www.linear.com/LTM8049
APPLICATIONS INFORMATION
4. Place the CIN and COUT capacitors such that their
ground current flow directly adjacent or underneath
the LTM8049.
5. Connect all of the GND connections to as large a copper
pour or plane area as possible on the top layer. Avoid
breaking the ground connection between the external
components and the LTM8049.
6. Use vias to connect the GND copper area to the board’s
internal ground planes. Liberally distribute these GND
vias to provide both a good ground connection and
thermal path to the internal planes of the printed circuit
board. Pay attention to the location and density of the
thermal vias in Figure 2. The LTM8049 can benefit from
theheat-sinkingaffordedbyviasthatconnecttointernal
GND planes at these locations, due to their proximity
to internal power handling components. The optimum
number of thermal vias depends upon the printed
circuit board design. For example, a board might use
very small via holes. It should employ more thermal
vias than a board that uses larger holes.
Hot-Plugging Safely
The small size, robustness and low impedance of ceramic
capacitors make them an attractive option for the input
bypass capacitor of LTM8049. However, these capacitors
can cause problems if the LTM8049 is plugged into a live
input supply (see Application Note 88 for a complete dis-
cussion). The low loss ceramic capacitor combined with
stray inductance in series with the power source forms an
underdamped tank circuit, and the voltage at the VIN pin
of the LTM8049 can ring to more than twice the nominal
inputvoltage,possiblyexceedingtheLTM8049’sratingand
damaging the part. If the input supply is poorly controlled
or the user will be plugging the LTM8049 into an energized
supply,theinputnetworkshouldbedesignedtopreventthis
overshoot. This can be accomplished by installing a small
resistor in series to VIN, but the most popular method of
controlling input voltage overshoot is to add an electrolytic
bulk capacitor to the VINnet.Thiscapacitor’srelativelyhigh
equivalentseriesresistancedampsthecircuitandeliminates
the voltage overshoot. The extra capacitor improves low
frequency ripple filtering and can slightly improve the ef-
ficiency of the circuit, though it is physically large.
Thermal Considerations
The LTM8049 output current may need to be derated if
it is required to operate in a high ambient temperature or
deliver a large amount of continuous power. The amount
of current derating is dependent upon the input voltage,
output power and ambient temperature. The temperature
rise curves given in the Typical Performance Character-
istics section can be used as a guide. These curves were
generated by a LTM8049 mounted to a 58cm2 4-layer FR4
printed circuit board. Boards of other sizes and layer count
can exhibit different thermal behavior, so it is incumbent
upon the user to verify proper operation over the intended
system’sline,loadandenvironmentaloperatingconditions.
The thermal resistance numbers listed in Page 2 of the
data sheet are based on modeling the µModule package
mounted on a test board specified per JESD51-9 (Test
Boards for Area Array Surface Mount Package Thermal
Measurements). The thermal coefficients provided in this
page are based on JESD 51-12 (Guidelines for Reporting
and Using Electronic Package Thermal Information).
Forincreasedaccuracyandfidelitytotheactualapplication,
many designers use FEA to predict thermal performance.
To that end, Page 2 of the data sheet typically gives four
thermal coefficients:
θJA: Thermal resistance from junction to ambient
θJCbottom: Thermal resistance from junction to the bottom
of the product case
θJCtop: Thermal resistance from junction to top of the
product case
θJB: Thermal resistance from junction to the printed circuit
board.
While the meaning of each of these coefficients may seem
to be intuitive, JEDEC has defined each to avoid confusion
and inconsistency. These definitions are given in JESD
51-12, and are quoted or paraphrased below:
θJA is the natural convection junction-to-ambient air
thermal resistance measured in a one cubic foot sealed
enclosure. This environment is sometimes referred to as



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