X1228 datasheet(7/31 Pages) XICOR

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X1228

REV 1.3 3/24/04

Characteristics subject to change without notice.

7 of 31

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Write Cycle Timing

Power Up Timing

Notes: (1)

Delays are measured from the time VCC is stable until the speciﬁed operation can be initiated. These parameters are not 100%

tested. VCC slew rate should be between 0.2mV/µsec and 50mV/µsec.

(2)

Typical values are for TA = 25°C and VCC = 5.0V

Nonvolatile Write Cycle Timing

Note:

(1) tWC is the time from a valid stop condition at the end of a write sequence to the end of the self-timed internal nonvolatile write cycle.

It is the minimum cycle time to be allowed for any nonvolatile write by the user, unless Acknowledge Polling is used.

WATCHDOG TIMER/LOW VOLTAGE RESET OPERATING CHARACTERISTICS

Watchdog/Low Voltage Reset Parameters (SeeFigures 3 and 4)

Symbol

Parameter

Min.

Typ.(2)

Max.

Units

tPUR

(1)

Time from Power Up to Read

tPUW

(1)

Time from Power Up to Write

Symbol

Parameter

Min.

Typ.(1)

Max.

Units

tWC

(1)

Write Cycle Time

Symbols

Parameters

Min.

Typ.

Max.

Unit

VPTRIP

Programmed Reset Trip Voltage

X1228-4.5A

X1228

X1228-2.7A

X1228-2.7

4.50

4.25

2.75

2.55

4.63

4.38

2.85

2.65

4.75

4.50

2.95

2.75

tRPD

VCC Detect to RESET LOW

500

tPURST

Power Up Reset Time-out Delay

100

250

400

VCC Fall Time

µs

VCC Rise Time

µs

tWDO

Watchdog Timer Period (Crystal=32.768kHz):

WD1=0, WD0=0

WD1=0, WD0=1

WD1=1, WD0=0

1.7

725

225

1.75

750

250

1.8

775

275

tRST

Watchdog Reset Time-out Delay (Crystal=32.768kHz)

225

250

275

tRSP

2-Wire interface

µs

VRVALID

Reset Valid VCC

1.0

SCL

SDA

tWC

8th Bit of Last Byte

ACK

Stop

Condition

Start

Condition

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