CS7410 datasheet(23/39 Pages) CIRRUS

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CS7410

DS553PP1

3. FUNCTIONAL DESCRIPTION

3.1

RISC-32 Processor

The CS7410 includes a powerful, proprietary 32-

bit RISC processor backed by powerful software

development tools. The RISC-32 has a MAC en-

gine which performs multiply/accumulate in 2 cy-

cles with C support, effectively achieving single

cycle throughput.

There are other instructions that are designed to

help with performing audio decoding. The RISC

processor

coordinates

on-chip

multi-threaded

tasks, as well as supervises system activities such

as keypad and front panel display control.

3.2

DSP-16 Processor

The CS7410 contains a proprietary digital signal

processor (DSP) called DSP-16, which is opti-

mized for audio and sound applications. In the

CS7410, the DSP-16 assists with audio decoding

and provides added functions such as surround

sound and equalization. The DSP performs 16-bit

simple integer operations, and has a 16-bit fixed

point logic unit with a 32-bit accumulator.

There are 24 general-purpose registers, and eight

independent address generation registers, featur-

ing: post-increment ALU, linear and circular buffer

operations, bit reverse ALU operations, and dual

operand read from memory. The multiply-accumu-

lator has single-cycle throughput, with two cycle

latency. The DSP is optimized for bit packing and

unpacking operations. The interface to main mem-

ory is designed for bursting flexible block sizes and

skip counts.

3.3

Memory Control

The Memory Controller performs the arbitration

functions for all the other modules in the CS7410,

allowing access to internal ROM and SRAM, and

to external ROM and DRAM. The Memory Con-

troller services and arbitrates a number of clients

and stores their code and/or data within the local

memory. This arbitration and scheduling guaran-

tees the allocation of sufficient bandwidth to the

various clients. An optimal application will use

only internal ROM and SRAM for code and data

storage, which results in the best timing and lowest

power consumption.

External DRAM may be used for runtime code

storage or for ESP RAM. In both of these applica-

tions, the data throughput requirement is low, and

the Memory Controller acts as a DMA engine to

move data between external and internal memory

with minimal power consumption. The internal

ROM contains most of the code required for audio

decoding and system functions.

Additional code can be stored in external ROM

(managed by the Memory Controller) or a small se-

rial ROM (controlled by GPIOs). The CS7410 also

supports code storage in external FLASH with in-

system write capability for customer code updates.

Future firmware releases will provide a complete

solution requiring no external ROM.

3.4

CD Interface

The CD Interface receives compressed or uncom-

pressed (direct audio) data from the CD servo/read

channel chip, performs descrambling and CRC

checking, and writes the data to an internal FIFO.

Additional C3 error decoding is done in software.

The CD interface is compatible with all commonly

used CD formats.

The CS7410 contains a hardware pattern matching

circuit to scan the incoming CD data for a pattern

of up to 64 bytes. This circuit is used to assist the

Electronic Shock Protection function by quickly lo-

cating and matching the incoming data with data

stored in the ESP RAM.

3.5

System Control Functions

The system control functions are used to coordinate

the activities of the multiple processors, and to pro-

vide the supporting system operations. Two 32-bit

communication registers are available for inter-

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