| Electronic Components Datasheet Search |
|
WM8772 Datasheet(PDF) 41 Page - Wolfson Microelectronics plc |
|
|
|||||||||||||||||||||||||||||
WM8772 Datasheet(HTML) 41 Page - Wolfson Microelectronics plc |
|
41 / 70 page ![]() Production Data WM8772EFT – 32 PIN TQFP w PD Rev 4.1 October 2004 41 WM8722EFT - 32 PIN TQFP MASTER CLOCK TIMING ADCMCLK/ DACMCLK t MCLKL t MCLKH t MCLKY Figure 33 ADC and DAC Master Clock Timing Requirements Test Conditions AVDD, VREFP = 5V, DVDD = 3.3V, AGND, VREFN = 0V, AGND, DGND = 0V, TA = +25 oC, fs = 48kHz, DACMCLK and ADCMCLK = 256fs unless otherwise stated. PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNIT System Clock Timing Information ADCMCLK and DACMCLK System clock pulse width high tMCLKH 11 ns ADCMCLK and DACMCLK System clock pulse width low tMCLKL 11 ns ADCMCLK and DACMCLK System clock cycle time tMCLKY 28 ns ADCMCLK and DACMCLK Duty cycle 40:60 60:40 Table 13 Master Clock Timing Requirements DIGITAL AUDIO INTERFACE – MASTER MODE ADCLRC DOUT DACBCLK DIN1/2/3 DACLRC WM8772 CODEC DSP/ ENCODER/ DECODER 3 ADCBCLK Figure 34 Audio Interface - Master Mode |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |