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FT260Q-R Datasheet(PDF) 27 Page - Future Technology Devices International Ltd. |
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FT260Q-R Datasheet(HTML) 27 Page - Future Technology Devices International Ltd. |
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27 / 61 page ![]() Copyright © Future Technology Devices International Limited 27 FT260 HID-CLASS USB TO UART/I2C BRIDGE IC Version 1.1 Document No.: FT_001272 Clearance No.: FTDI#484 5.4 GPIOs Most of the digital I/O pins of the FT260 have a GPIO function as an alternative function. For example, pin 10 can be RXD or GPIOC, and RXD is the main function of pin 10. Usually, if the main function of a pin is switched off, the pin will be switched to a GPIO pin. Therefore, if UART is turned off, all UART pins will become GPIO pins. The FT260 has 3 pins which have more than 2 functions. They are GPIO 2(pin 14), GPIOA (pin 7), and GPIOG (pin 27). The working function of these 3 pins can be configured by eFUSE, EEPROM, or via USB commands. Please refer to the eFUSE and EEPROM sections for more details. The FT260 has two sets of GPIO pins: GPIO0~5 and GPIOA~H. After the pins are configured as GPIO, users can set or get the direction and pin status via the USB control pipe, i.e. HID SET_REPORT and GET_REPORT requests. The FT260 also provides an interrupt input source on GPIO3/Interrupt (pin 15). If the interrupt is triggered, the FT260 will generate an interrupt report with report ID 0xB1 via the interrupt IN pipe from the UART interface. The FT260 interrupt provides 4 trigger types: rising edge, falling edge, level-high, and level-low. By default, it is configured as level-high for 30ms. Note, that GPIO and interrupt are two different functions, which means if interrupt is the working function of pin 15, users cannot set and get GPIO3 status. Switching pin 15 to be either GPIO or interrupt and trigger settings can be done via EEPROM or USB commands. The FT260 has flexible settings for suspend behaviour of all digital I/O pins. During suspend, these pins can perform pushing high, pushing low, tristate, or no-change. No-change means to keep the original function and value during suspend. The suspend behaviour can be configured in an external EEPROM. |
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