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LIS2DH12 Datasheet(PDF) 35 Page - STMicroelectronics |
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LIS2DH12 Datasheet(HTML) 35 Page - STMicroelectronics |
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35 / 53 page  DocID025056 Rev 6 35/53 LIS2DH12 Register description 53 ODR[3:0] is used to set the power mode and ODR selection. The following table indicates the frequency of each combination of ODR[3:0]. By design, when the device from high-resolution configuration (HR) is set to power-down mode (PD), it is recommended to read register REFERENCE (26h) for a complete reset of the filtering block before switching to normal/high-performance mode again for proper device functionality. Table 31. Data rate configuration ODR3 ODR2 ODR1 ODR0 Power mode selection 0 0 0 0 Power-down mode 0 0 0 1 HR / Normal / Low-power mode (1 Hz) 0 0 1 0 HR / Normal / Low-power mode (10 Hz) 0 0 1 1 HR / Normal / Low-power mode (25 Hz) 0 1 0 0 HR / Normal / Low-power mode (50 Hz) 0 1 0 1 HR / Normal / Low-power mode (100 Hz) 0 1 1 0 HR / Normal / Low-power mode (200 Hz) 0 1 1 1 HR/ Normal / Low-power mode (400 Hz) 1 0 0 0 Low-power mode (1.620 kHz) 1 0 0 1 HR/ Normal (1.344 kHz); Low-power mode (5.376 kHz) |
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