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PC87309VLJ Datasheet(PDF) 26 Page - National Semiconductor (TI) |
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PC87309VLJ Datasheet(HTML) 26 Page - National Semiconductor (TI) |
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26 / 192 page ![]() Configuration 26 www.national.com TABLE 2-12. Parallel Port Configuration Registers - Logical Device 1 TABLE 2-13. UART2 and Infrared Configuration Registers - Logical Device 2 Index R/W Hard Reset Soft Reset Configuration Register or Action 30h R/W 00h 00h Activate. See also FER1 of the Power Management device (Logical Device 4). 31h R/W 00h 00h I/O Range Check. 60h R/W 02h 02h Base Address MSB register. Bits 7-3 (for A15-11) are read only, 00000b. 61h R/W 78h 78h Base Address LSB register. Bits 1,0 (for A1,0) are read only, 00b. See Section 2.2.2 on page 20. 70h R/W 07h 07h Interrupt Select. 71h R/W 00h 00h Interrupt Type. Bit 0 is read only. It reflects the interrupt type dictated by the Parallel Port operation mode and configured by the SuperI/O Parallel Port Configuration register. This bit is set to 1 (level interrupt) in Extended Mode and cleared (edge interrupt) in all other modes. Bit 1 is a read/write bit. Bits 7-2 are read only. 74h R/W 04h 04h DMA Channel Select. 75h R 04h 04h Report no DMA assignment. F0h R/W See Section 2.6 No Effect SuperI/O Parallel Port Configuration register. Index R/W Hard Reset Soft Reset Configuration Register or Action 30h R/W 00h 00 Activate. See also FER1 of the Power Management device (Logical Device 4). 31h R/W 00h 00h I/O Range Check. 60h R/W 02h 02h Base Address MSB register. Bits 7-3 (for A15-11) are read only, 00000b. 61h R/W F8h F8h Base Address LSB register. Bit 2-0 (for A2-0) are read only, 000b. 70h R/W 03h 03h Interrupt Select. 71h R/W 03h 03h Interrupt Type. Bit 1 is R/W; other bits are read only. 74h R/W 04h 04h DMA Channel Select 0 (RX_DMA). 75h R/W 04h 04h DMA Channel Select 1 (TX_DMA). F0h R/W See Section 2.7 No Effect SuperI/O UART2 Configuration register. |
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