PC87309VLJ datasheet(34/192 Pages) NSC

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The Floppy Disk Controller (FDC) (Logical Device 0)

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3.0

The Floppy Disk Controller (FDC)

(Logical Device 0)

The Floppy Disk Controller (FDC) is suitable for all PC-AT,

EISA, PS/2, and general purpose applications. DP8473 and

N82077 software compatibility is provided. Key features in-

clude a 16-byte FIFO, PS/2 diagnostic register support, per-

pendicular recording mode, CMOS disk input and output

logic, and a high performance Digital Data Separator (DDS).

Figure 3-1 shows a functional block diagram of the FDC.

The rest of this chapter describes the FDC functions, data

transfer, the FDC registers, the phases of FDC commands,

the result phase status registers and the FDC commands,

in that order.

3.1

FDC FUNCTIONS

FDC functions are enabled when the FDC Function Enable

bit (bit 3) of the Function Enable Register 1 (FER1) at offset

00h in logical device 8 is set to 1. See Section 7.2.3 on page

155.

The PC87309 is software compatible with the DP8473 and

82077 Floppy Disk Controllers. Upon a power-on reset, the

16-byte FIFO is disabled. Also, the disk interface output sig-

nals are configured as active push-pull output signals,

which are compatible with both CMOS input signals and

open-collector resistor terminated disk drive input signals.

The FIFO can be enabled with the CONFIGURE command.

The FIFO can be very useful at high data rates, with sys-

tems that have a long DMA bus latency, or with multi-task-

ing systems such as the EISA or MCA bus structures.

The FDC supports all the DP8473 MODE command fea-

tures as well as some additional features. These include

control over the enabling of the FIFO for read and write op-

erations, disabling burst mode for the FIFO, a bit that will

configure the disk interface outputs as open-drain output

signals, and programmability of the DENSEL output signal.

DRATE0 and DENSEL pins are not available in the default

configuration of Two-UART mode. You may optionally se-

lect them on other FDC pins or on IR pins. When working

with no DRATE0 or DENSEL, you must set the BIOS and

the floppy drive to support this operation.

3.1.1

Microprocessor Interface

The Floppy Disk Controller (FDC) receives commands,

transfers data, and returns status information via an FDC

microprocessor interface. This interface consists of the

A9-3, AEN, RD, and WR signals, which access the chip for

read and write operations; the data signals D7-0; the ad-

dress lines A2-0, which select the appropriate register (see

TABLE 3-1 on page 38) an IRQ signal, and the DMA inter-

face signals DRQ, DACK, and TC.

3.1.2

System Operation Modes

The FDC operates in PC-AT or PS/2 drive mode, depending

on the value of bit 2 of the SuperI/O Configuration 1 register

at index 21h. See Section 2.4.2 on page 28.

FIGURE 3-1. FDC Functional Block Diagram

Internal Control and Data Bus

Interface

Logic

Address

Decoder

DMA

Enable

Logic

Main Status

16-Byte

FIFO

(MSR)

PC8477B

Micro-Engine

and

Timing/Control

Logic

Data Rate

Selection

(DSR)

Configuration

Control

(CCR)

2 KB x 16

Micro-Code

Status

Digital Input

(DIR)

Digital Output

(DOR)

Write

Precompen-

Digital

Data

Separator

(DDS)

Disk

Input

and

Output

Logic

DRATE0

DENSEL

DIR

DR1

HDSEL

MTR0

sator

MTR1

STEP

WGATE

WDATA

DSKCHG

INDEX

RDATA

TRK0

FDC Chip

A2-0

Reset

D7-0

FDC DMA

Interrupt

FDC Clock

Select

Acknowledge

Request

DR0

PC87309VLJ Datasheet(PDF) 34 Page - National Semiconductor (TI)

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