SEA01 datasheet(9/24 Pages) STMICROELECTRONICS

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SEA01

Online digital trimming procedure

3.1

General features

The embedded digital trimming allows the user to adjust and permanently store using

software, both the VrefV and VrefI internal references during the production test of the end-

product, compensating the tolerance of the external components and the error due to their

discretized values.

The device provides a non-volatile memory (NVM) based on a redundant OTP (two OTP,

one-time-programmable memories) and a volatile memory.

The volatile memory is used to adjust the value of both VrefV and VrefI internal references.

Once the optimal values have been found, the user can permanently store them in the OTP

memory.

The presence of a second OTP allows the user to perform a second trimming of the device.

It is possible to perform a new search of the optimal values of VrefV and VrefI and

permanently store these values in the second OTP.

At device power-on the values of VrefV and VrefI depend on the OTP status:

–

if the IC non-volatile memory has never been burned (i.e. no value has ever been

permanently stored in OTP memories) VrefV and VrefI are initialized at the default

values (see Table 6 and Table 7)

–

if the IC non-volatile memory has been burned a first time (i.e. values stored in the

first OTP) VrefV and VrefI are the values selected and stored by the user during

the first trimming process

–

if the IC non-volatile memory has been burned a second time (i.e.values stored in

the second OTP) VrefV and VrefI are the values selected and stored by the user

during the second trimming process

The device is provided with an I2C slave-only interface that requires only two pins for the

communication: DATA and CLOCK. The I2C interface allows the user to access the device

in a simple way, using the I2C-bus, also assuring robust data communication integrity thanks

to an additional parity check control.

Two wires, serial data and serial clock, carry information between the devices connected to

the I2C bus. SEA01 can operate only as an I2C-slave, i.e. it needs to be addressed by a

master (a microcontroller, industrial PC, ATE, etc.) that initiates a data transfer on the bus

and generates the clock signal to permit that transfer. Generation of clock signals on the

I2C-bus is always the responsibility of the master. SEA01 can operate as either a receiver or

transmitter (transmitter-slave) depending on the command received from the master. The

serial data and serial clock are bidirectional lines connected to a positive supply voltage

through a pull-up resistor: SEA01 has an internal pull-up on the DATA and CLOCK pins in

order to pull HIGH the pins when they are floating, but the user has to implement an

adequate pull-up of the lines using external pull-up resistors. When the bus is free, both

lines are HIGH. The data on the serial data line must be stable during the HIGH period of

the clock. The HIGH or LOW state of the data line can only change when the clock signal on

the serial clock line is LOW.

Within the procedure of the I2C-bus, unique situations arise which are defined as START (S)

and STOP (P) conditions. A HIGH-to-LOW transition on the serial data line while the serial

clock is HIGH is one such unique case. This situation indicates a START condition. A LOW-

to-HIGH transition on the serial data line while the serial clock line is HIGH defines a STOP

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