L7987L datasheet(36/41 Pages) STMICROELECTRONICS

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Application ideas

L7987L

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DocID026362 Rev 3

Equation 38

The singularity

RHPZ = 2 · fRHPZ, computed at the maximum load and minimum input

voltage, is the limitation in the loop bandwidth design. Typically the maximum bandwidth,

fBW, is designed to be lower than one fourth of the above described singularity, in order to

achieve a good phase margin.

In case

Z and LC are lower than the target bandwidth, a type II compensation network is

enough for loop stabilization, following the compensation strategy described in Section 5.4.1

on page 25.

In case ceramic or very low ESR electrolytic output capacitors are used,

Z is typically

higher than the target fBW so a type III compensation network is necessary, as described in

Section 5.4.2 on page 27.

7.2

Negative buck-boost

The L7987L device can implement the step-up/down conversion with a negative output

voltage.

Figure 25 shows the schematic to regulate -12 V at the 1 A maximum load, assuming VIN

falling in the range 12 V to 48 V. No further external components are added to the standard

buck topology.

Figure 25. L7987L - negative (or inverting) buck-boost schematic example

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L7987L Datasheet(PDF) 36 Page - STMicroelectronics