 |
Electronic Components Datasheet Search |
|
|
Electronic Components Datasheet Search |
|
STM32F101XF Datasheet(PDF) 97 Page - STMicroelectronics |
|
|
|||||||||||||||||||||||||||||
STM32F101XF Datasheet(HTML) 97 Page - STMicroelectronics |
|
|
97 / 117 page  DocID16553 Rev 5 97/117 STM32F101xF, STM32F101xG Electrical characteristics Figure 50. Power supply and reference decoupling (VREF+ connected to VDDA) 1. VREF+ and VREF- inputs are available only on 100-pin packages. 5.3.19 DAC electrical specifications Table 60. DAC characteristics Symbol Parameter Conditions Min Typ Max(1) Unit Comments VDDA Analog supply voltage 2.4 - 3.6 V - VREF+ Reference supply voltage 2.4 - 3.6 V VREF+ must always be below VDDA VSSA Ground 0 - 0 V - RLOAD(2) Resistive load with buffer ON DAC output buffer ON RLOAD connected to VSSA 5- - k Ω - RLOAD connected to VDDA 25 - - - RO(2) Impedance output with buffer OFF -- 15 k Ω When the buffer is OFF, the minimum resistive load between DAC_OUT and VSS to have a 1% accuracy is 1.5 M Ω CLOAD(2) Capacitive load - - 50 pF Maximum capacitive load at DAC_OUT pin (when the buffer is ON). |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
British ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
