3-Phase Sinusoidal Motor Controller

A4923

9

Allegro MicroSystems, LLC

115 Northeast Cutoff

Worcester, Massachusetts 01615-0036 U.S.A.

1.508.853.5000; www.allegromicro.com

Package ET, 32-Pin QFN

with Exposed Thermal Pad

32

32

2

1

2

1

A

A Terminal #1 mark area

B Exposed thermal pad (reference only, terminal #1

identifier appearance at supplier discretion)

For Reference Only; not for tooling use

(reference JEDEC MO-220VHHD-5)

Dimensions in millimeters

Exact case and lead configuration at supplier discretion within limits shown

C Reference land pattern layout (reference

IPC7351 QFN50P500X500X100-33V6M);

All pads a minimum of 0.20 mm from all adjacent pads; adjust as

necessary to meet application process requirements and PCB layout

tolerances; when mounting on a multilayer PCB, thermal vias at the

exposed thermal pad land can improve thermal dissipation (reference

EIA/JEDEC Standard JESD51-5)

B

32

2

1

PCB Layout Reference View

3.40

3.40

0.50 BSC

5.00 ±0.05

5.00 ±0.05

0.90 ±0.10

0.25

+0.05

-0.07

0.40 ±0.10

3.40

3.40

0.30

1

0.50

1.00

5.00

5.00

C

C

0.08

33X

SEATING

PLANE

C

D

D Coplanarity includes exposed thermal pad and terminals

For the sidewall plating PCB footprint, see:

http://www.allegromicro.com/en/Design-Center/Packaging.aspx