AD9993BBCZ datasheet(43/57 Pages) AD

43 / 57 page

AD9993

Data Sheet

Rev. A | Page 42 of 56

DAC CORES CONTROL REGISTER

Address: 0x039, Reset: 0x02, Name: DAC_CTRL

Table 36. Bit Descriptions for DAC_CTRL

Bits

Bit Name

Description

Reset

Access

DAC_TRANS

DAC input latch data transfer method select.

0x0

0 = edge triggered.

1 = level triggered.

[6:4]

DAC_VCM_VREF_BIT

Sets DAC common-mode level.

0x0

000 = 0.0 V.

001 = 0.2 V.

010 = 0.3 V.

011 = 0.4 V

100 = 0.5 V

101 = 0.6 V

110 = 0.7 V.

111 = 0.8 V.

DAC_RSET_EN

Selects on-chip RFSADJ_x resistor.

0x1

DAC_REF_EXT

Selects external DAC Reference voltage. Set to 1 to use an off-chip DAC

reference.

0x0

DAC DATAPATH FORMAT CONTROL REGISTER

Address: 0x03A, Reset: 0x00, Name: DAC_DP_FMT

Table 37. Bit Descriptions for DAC_DP_FMT

Bits

Bit Name

Description

Reset

Access

DAC_BINARY

Enable binary offset data format (default is twos complement).

0x0

0 = twos complement.

1 = binary offset.

AD9993BBCZ Datasheet(PDF) 43 Page - Analog Devices

AD9993BBCZ Datasheet(HTML) 43 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57

Datasheet Download

Link URL