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AD9925BBCZ Datasheet(PDF) 17 Page - Analog Devices |
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AD9925BBCZ Datasheet(HTML) 17 Page - Analog Devices |
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17 / 96 page  AD9925 Rev. A | Page 17 of 96 H1/H3 H2/H4 RG NOTE 1. USING THE SAME TOGGLE POSITIONS FOR H1 AND H3 GENERATES STANDARD 2-PHASE H-CLOCKING. CCD SIGNAL Figure 19. 2-Phase H-Clock Operation Table 9. Precision Timing Edge Locations Quadrant Edge Location (Dec) Register Value (Dec) Register Value (Bin) I 0 to 11 0 to 11 000000 to 001011 II 12 to 23 010000 to 011011 16 to 27 I 24 to 35 32 to 43 100000 to 101011 II IV 36 to 47 48 to 59 110000 to 111011 P[0] PIXEL PERIOD RG H1/H3 P[48] = P[0] CCD SIGNAL P[24] P[12] P[36] NOTES 1. ALL SIGNAL EDGES ARE FULLY PROGRAMMABLE TO ANY OF THE 48 POSITIONS WITHIN ONE PIXEL PERIOD. 2. DEFAULT POSITIONS FOR EACH SIGNAL ARE SHOWN. POSITION H2/H4 RGr[0] RGf[12] Hr[0] Hf[24] SHP[24] tS1 SHD[48] Figure 20. High Speed Timing Default Locations |
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