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VSC7182 Datasheet(PDF) 6 Page - Vitesse Semiconductor Corporation

Part # VSC7182
Description  Quad Transceiver for Gigabit Ethernet and Fibre Channel
PDF  18 Pages
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Manufacturer  VITESSE [Vitesse Semiconductor Corporation]
Direct Link  http://www.vitesse.com
Logo VITESSE - Vitesse Semiconductor Corporation

VSC7182 Datasheet(HTML) 6 Page - Vitesse Semiconductor Corporation

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VITESSE
SEMICONDUCTOR CORPORATION
®
Advance Product Information
VSC7182
Quad Transceiver
for Gigabit Ethernet and Fibre Channel
Page 6
G52307-0, Rev 2.2
10/10/00
© VITESSE SEMICONDUCTOR CORPORATION • 741 Calle Plano • Camarillo, CA 93012
Tel: (800) VITESSE • FAX: (805) 987-5896 • Email: prodinfo@vitesse.com
Internet: www.vitesse.com
AC Characteristics
Figure 3: Transmit Timing Waveforms
Table 3: Transmitter AC Characteristics
Parameter
Description
Min
Typ
Max
Units
Conditions
T1
TXi[0:9] setup time to the rising edge
of TCi or RFC
1.5
ns
Measured between the valid
data level of TXi[0:9] to the
1.4V point of TCi or RFC
T2
TXi[0:9] hold time after the rising
edge of TCi or RFC
1.0
ns
TSDR,TSDF
TXi+/TXi- rise and fall time
300
ps
20% to 80%, 75
Ω load to
VDD/2, tested on a sample
basis
TRLAT
Latency from rising edge of RFC to
TXi0 appearing on TX+/TX-
7bc +
0.66ns
7bc +
1.46ns
bc = bit clocks
ns = nanoseconds
TTLAT
Latency from rising edge of TCi to
TXi0 appearing on TX+/TX-
5bc +
0.66ns
11bc
+
1.46ns
ns
bc = bit clocks
ns = nanoseconds
Transmitter Output Jitter
RJ
Random jitter (rms)
5
8
ps
Measured at SO+/-, 1 sigma
deviation of 50% crossing
point
DJ
Serial data output deterministic jitter
(pk-pk)
35
80
ps
IEEE 802.3Z Clause 38.68,
tested on a sample basis
Data Valid
TXi[0:9]
T1
10-Bit Data
T2
RFC
Data Valid
Data Valid
TCi
TRLAT
+/-TXi
TXi0
TXi1
TXi2
RFC
TCi
TTLAT



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