NM1282KSLAXAL datasheet(78/120 Pages) NANYA

78 / 120 page

Version 1.3

Nanya Technology Corp.

06/2018

2Gb SLC NAND + 2Gb LPDDR2

NM1282KSLAXAL

NTC Proprietary

Level: Property

Differential AC and DC Input Levels

Differential Inputs logical levels (CK, 

– VREF = VREFCA(DC); DQS, : VREF = VREFDQ(DC))

Symbol

Parameter

LPDDR2 1066

Unit

Min

Max

VIHdiff(AC)

Differential input voltage HIGH AC

2 x (VIH(AC)-VREF)

Note 3

VILdiff(AC)

Differential input voltage LOW AC

Note 3

2 x (VREF-VIL(AC))

VIHdiff(DC)

Differential input voltage HIGH DC

2 x (VIH(DC)-VREF)

Note 3

VILdiff(DC)

Differential input voltage LOW DC

Note 3

2 x (VREF-VIL(DC))

Notes:

1. Used to define a differential signal slew-rate. For CK –  use VIH/VIL(dc) of CA and VREFCA; for DQS – , use VIH/VIL(dc) of

DQs and VREFDQ; if a reduced dc-high or dc-low level is used for a signal group, then the reduced level applies also here.

2. For CK and , use VIH/VIL(AC) of CA and VREFCA; for DQS and , use VIH/VIL(AC) of DQ and VREFDQ. If a reduced AC HIGH or AC

LOW is used for a signal group, the reduced voltage level also applies.

3. These values are not defined, however the single-ended signals CK, , DQS, and  must be within the respective limits

(VIH(DC)max, VIL(DC)min) for single-ended signals and must comply with the specified limitations for overshoot and undershoot.

CK,  and DQS,  Time Requirement before Ring back (tDVAC)

Slew Rate

(V/ns)

tDVAC(ps) at

VIH/VILdiff(AC) = 440 mV

Min

>4.0

175

4.0

170

3.0

167

2.0

163

1.8

162

1.6

161

1.4

159

1.2

155

1.0

150

<1.0

150

NM1282KSLAXAL Datasheet(PDF) 78 Page - Nanya Technology Corporation.

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