STM8S datasheet(363/467 Pages) STMICROELECTRONICS

363 / 467 page

DocID14587 Rev 14

363/467

RM0016

Universal asynchronous receiver transmitter (UART)

377

22.7

UART registers

22.7.1

Status register (UART_SR)

Address offset: 0x00

Reset value: 0xC0

654

3210

TXE

RXNE

IDLE

OR/LHE

rc_w0

rrrr

Bit 7 TXE: Transmit data register empty

This bit is set by hardware when the content of the TDR register has been transferred into the shift

write to the UART_DR register.

0: Data is not transferred to the shift register

1: Data is transferred to the shift register

Bit 6 TC: Transmission complete

This bit is set by hardware if the transmission of a frame containing data is complete and TXE bit is

set. An interrupt is generated if TCIEN=1 in the UART_CR2 register. The TC bit is cleared either by

a software sequence (a read to the UART_SR register followed by a write to the UART_DR

communications.

0: Transmission is not complete

1: Transmission is complete

Bit 5 RXNE: Read data register not empty

This bit is set by hardware when the content of the RDR shift register has been transferred to the

UART_DR register. An interrupt is generated if RIEN=1 in the UART_CR2 register. It is cleared by a

read to the UART_DR register. In UART2 and UART3, it can also be cleared by writing 0.

0: Data is not received

1: Received data is ready to be read.

Bit 4 IDLE: IDLE line detected (1)

This bit is set by hardware when an Idle Line is detected. An interrupt is generated if the ILIEN=1 in

the UART_CR2 register. It is cleared by a software sequence (a read to the UART_SR register

followed by a read to the UART_DR register).

0: No Idle Line is detected

1: Idle Line is detected

STM8S Datasheet(PDF) 363 Page - STMicroelectronics

STM8S Datasheet(HTML) 363 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL