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PWD13F60 Datasheet(PDF) 7 Page - STMicroelectronics |
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PWD13F60 Datasheet(HTML) 7 Page - STMicroelectronics |
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7 / 26 page ![]() DocID030865 Rev 2 7/26 PWD13F60 Electrical data 26 3.2 Recommended operating conditions 3.3 Thermal data Table 3. Recommended operating conditions Symbol Parameter Test condition Min. Max. Unit VCC1, VCC2 Driver supply voltage - 6.5(1) 1. The integrated gate driver can work with VCC as low as VCC_thON. Higher supply voltage allows decreasing the MOSFETs RDS(on). -V VBO1, VBO2 BOOTx to OUTx pin voltage - 6.5(1) -V VS High-voltage supply - - 480 V TJ Junction temperature - -40 125 °C Table 4. Thermal data Symbol Parameter Value Unit Rth(J-CB) Thermal resistance junction to each MOSFET exposed pad, typ. 1.1 °C/W Rth(J-A) Thermal resistance junction to ambient(1) 1. The junction to ambient thermal resistance is obtained simulating the device mounted on a FR4 2s2p board as the JESD51-5/7 with power dissipation uniformly distributed over the four power MOSFETs. 18 °C/W |
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