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STM32WL55JC Datasheet(PDF) 12 Page - STMicroelectronics |
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STM32WL55JC Datasheet(HTML) 12 Page - STMicroelectronics |
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12 / 145 page  Description STM32WL55/54xx 12/145 DS13293 Rev 1 These devices also embed two DMA controllers (7 channels each) allowing any transfer combination between memory (Flash memory, SRAM1 and SRAM2) and peripheral, using the DMAMUX1 for flexible DMA channel mapping. The devices also feature the standard and advanced communication interfaces listed below: • inter-processor communication controller (mailbox) and semaphores for communication between the two Arm® Cortex®-M cores • two USART (supporting LIN, smartcard, IrDA, modem control and ISO7816) • one low-power UART (LPUART) • three I2C (SMBus/PMBus) • two SPIs (up to 16 MHz, one supporting I2S) The operating temperature/voltage ranges are –40 °C to +105 °C (+85 °C with radio)(a) from a 1.8 V to 3.6 V power supply. A comprehensive set of power-saving modes allows the design of low-power applications. The devices integrate a high-efficiency SMPS step-down converter and independent power supplies for ADC, DAC and comparator analog inputs. A VBAT dedicated supply allows the LSE 32.768 kHz oscillator, the RTC and the backup registers to be backed up. The devices can maintain these functions even if the main VDD is not present, through a CR2032-like battery, a supercap or a small rechargeable battery. a. Devices with suffix 6 operate up to 85 °C. Devices with suffix 7 can operate up to 105 °C except radio. Table 2. Main features and peripheral count Feature STM32WL55Cx STM32WL54Cx STM32WL55Jx STM32WL54Jx STM32WL55Ux STM32WL54Ux CPU Arm Cortex-M4 and Cortex-M0 Maximum CPU frequency (MHz) 48 Flash memory density (Kbytes) 256 SRAM density (Kbytes) SRAM1 32 SRAM2 32 Radio LoRa Available on STM32WL55xx devices. Not available on STM32WL54xx devices (G)FSK Yes (G)MSK BPSK Radio PA Low output power (up to 15 dBm) Yes High output power (up to 22 dBm) Timer General purpose 4 Low-power 3 SysTick 1 |
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