DS31256_V01 datasheet(174/183 Pages) MAXIM

174 / 183 page

DS31256 256-Channel, High-Throughput HDLC Controller

174 of 183

AC CHARACTERISTICS: PCI BUS INTERFACE

(VDD = 3.0V to 3.6V, TA = 0°C to +70°C.)

PARAMETER

SYMBOL

CONDITIONS

MIN

TYP

MAX

UNITS

PCLK Period

(Note 15)

PCLK Low Time

PCLK High Time

All PCI Inputs and I/O Setup Time to the

Rising Edge of PCLK

All PCI Inputs and I/O Hold Time from the

Rising Edge of PCLK

Delay from the Rising Edge of PCLK to

Data Valid on All PCI Outputs and I/O

(Note 16)

Delay from the Rising Edge of PCLK to

Tri-State on All PCI Outputs and I/O

Delay from the Rising Edge of PCLK to

Active from Tri-State on All PCI Outputs

and I/O

Note 15: Aggregate, maximum bandwidth and port speed for the DS31256 are directly proportional to PCLK frequency. Ensure that PCLK is

33MHz for maximum throughput.

Note 16: The PCI extension signals PABLAST, PXAS, and PXDS have a 15ns max. These signals are not part of the PCI Specification.

Figure 13-5. PCI Bus Interface AC Timing Diagram

PCLK

PCI Input

& I/O

PCI Output

& I/O

PCI Output &

I/O to Tri-State

PCI Output &

I/O from Tri-State

Tri-State

Data Valid

DS31256 Datasheet(PDF) 174 Page - Maxim Integrated Products

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