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MIC33M350 Datasheet(PDF) 15 Page - Microchip Technology

Part # MIC33M350
Description  3A, Pin Strapping Power Module with HyperLight Load짰 Mode and Output Voltage Select
PDF  32 Pages
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Manufacturer  MICROCHIP [Microchip Technology]
Direct Link  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

MIC33M350 Datasheet(HTML) 15 Page - Microchip Technology

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 2020-2021 Microchip Technology Inc.
DS20006348B-page 15
MIC33M350
3.0
PIN DESCRIPTION
The descriptions of the pins are listed in Table 3-1.
TABLE 3-1:
PIN FUNCTION TABLE
MIC33M350
Symbol
Pin Function
1, 2, 3, 10, 11
PGND
Power Ground Pin: PGND is the ground path for the MIC33M350 buck
converter power stage.
4, 5, 6, 7, 8, 9
SW
Switch Node Pin
17
PVIN
Power Supply Voltage Pin
18
SVIN
Analog Voltage Input Pin. The power to the internal reference and
control sections of the MIC33M350 device. A 1.0 µF ceramic
capacitor from SVIN to GND must be used. Internally connected to
PVIN through a 10 resistor.
19
VSEL2
Output Voltage Selection Control Pin 2 (Input): The Logic state of the
VSEL1 and VSEL2 selects the register that sets the output voltage. This
input has three Digital states: High, Low and Floating.
20
VSEL1
Output Voltage Selection Control Pin 1 (Input): The Logic state of the
VSEL1 and VSEL2 selects the register that sets the output voltage. This
input has three Digital states: High, Low and Floating.
21
EN
Enable Pin (Input): Logic high enables operation of the regulator. The
EN pin should not be left open.
22
PG
Power Good Pin (Output): This is an open-drain output that indicates
when the output voltage is lower than the 91% limit.
23
VOUT
Output Voltage Sense Pin (Input): This pin is used to remote sense
the output voltage. Connect VOUT as close to the output capacitor as
possible to sense output voltage. Also provides the path to discharge
the output through an internal 10
 resistor when disabled.
12, 13, 14, 15, 16
OUT
Power Output Side Connection Pins
24
AGND
Analog Ground: Internal signal ground for all low-power circuits
25
EP1_PGND
Exposed Thermal Pad Pin: Internally connected to PGND
26
EP2_PGND
Exposed Thermal Pad Pin: Internally connected to PGND
27
EP_SW
Exposed Thermal Pad Pin: Internally connected to SW Node
28
EP_OUT
Exposed Thermal Pad Pin: Internally connected to Output side



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