L9374LF datasheet(49/80 Pages) STMICROELECTRONICS

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L9374LF

Circuit description

sequence the internal registers are reset. It’s not possible to interrupt the BIST. When

the BIST is completed, the BIST busy bit is reset to’0’ and the checksum is available to

be read.

The BIST_BUSY bit reflects the actual status of the sequencer. 1: BIST is running or

has been run previously and no current regulation is possible.

Readout the BIST checksum value located in status address 8, bits D0 - D9).

Repeat steps 2 and 3 until all of the polynomials have been run through the sequencer.

To exit the BIST mode write FSOFF_ALL = ‘01’ (command address 2, bits D4 & D5).

At this point you must re-program a new RL value (SPI command address 15, RL =

xxxxxxxx).

Note: Once leaving the BIST mode the internal registers are set to default values. After

exiting the BIST mode and providing a new RL value the sequencer is ready to learn a

new current regulation.

It is possible to program new current regulator set values in the same SPI access loop

(Address. 0 to 15) where the BIST is stopped and a new RL value is written.

Affected internal registers from BIST:

XBuf

YBuf

DC0

ISAT_Q3

Integration register for Channel 3

The contents of these register are reset at the initiation and completion of the BIST.

Just using the fast switch off command alone (FSOFF_ALL=’10) does not initiate a BIST.

This action will only initiate the sequencer into the BIST ready state. The BIST will not be

started until programing a polynomial via SPI into address 15 is completed. Until that point

the internal registers will not be reset. It is possible to leave the BIST ready state with by

reversing the fast switch off command (Command address 2, FSOFF_ALL = ‘01’). The

sequencer is then ready for new current regulation commands.

L9374LF Datasheet(PDF) 49 Page - STMicroelectronics