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L9788 Datasheet(PDF) 76 Page - STMicroelectronics |
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L9788 Datasheet(HTML) 76 Page - STMicroelectronics |
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76 / 264 page  Multi-voltage regulator supplies L9788 76/264 DS12308 Rev 4 PSRRVDD5 Supply voltage rejection ratio Cout = 10 µF, ESR = 0.1Ω Iload = 600 mA f = 10 kHz - - -35 dB VDD5_IN VOS_VDD5 VDD5 voltage with overshoot admitted at switch on - 0 0.1 0.2 V VDD5_IN TUV_filter_VDD5 Undervoltage filter time(1) - 16 24 32 µs VDD5_IN TOV_filter_VDD5 Overvoltage filter time(1) - 16 24 32 µs VDD5_IN VUV_VDD5_L VDD5 undervoltage hysteresis threshold low - 4.5 4.65 4.75 V VDD5_IN VUV_VDD5_H VDD5 undervoltage hysteresis threshold high - 4.7 4.8 4.9 V VDD5_IN VOV_VDD5 VDD5 overvoltage threshold - 5.3 5.4 5.5 V VDD5_IN VVDD5_GATE_Min Pre-driver gate voltage VPre = 4.8 V to force regulator in low drop condition 8 - - V VDD5_GATE VVDD5_GATE_MAX Pre-driver gate voltage Force 5 mA into VDD5_GATE - - 15 V VDD5_GATE VGS OFF condition VDD5_GATE- VDD5_IN Device off - - 0.5 V VDD5_GATE 1. line and load regulation are guaranteed until the loop is able to regulate after they are defined by low drop parameters; Over shoot during power up should not be triggered over voltage warning. UV/OV fault detection during power up sequence is masked until RSTN release to avoid false triggering at ramp-up phase. With external MOS different from STD20NF06L regulated voltage could violate UV threshold but for a time shorter than digital deglitch, so it would not be able to trigger UV/OV fault. With STD20NF06L MOS no UV/OV violation is expected on this and other regulators. Table 34. VDD5 linear controller pre-driver electrical characteristics (continued) Symbol Parameter Test condition Min Typ Max Unit Pin Table 35. Linear controller pre-driver. External components characteristics Symbol Parameter Note Min Typ Max Unit Pin CVDD5 External VDD5 capacitor 10 µF to guarantee ESR = 50 mΩ for load transient response 5 20 60 µF VDD5_IN - External n-MOS STD20NF06L - - - - VDD5_IN, VDD5_GATE |
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