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STPM32 Datasheet(PDF) 36 Page - STMicroelectronics |
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STPM32 Datasheet(HTML) 36 Page - STMicroelectronics |
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36 / 121 page ![]() Theory of operation STPM32, STPM33, STPM34 36/121 DS10272 Rev 8 CLKOUT pin can be used to feed another STPM3x device clock with 16 MHz, when multiple STPM3x are used in cascade as shown in Figure 27. Figure 27. Clock feed for multiple devices 8.2.4 Power-on-reset (POR) and enable (EN) The STPM3x contains a power-on-reset (POR) circuit which delays the startup of the digital domain about 750 μs. If VCC supply is less than 2.5 V the STPM3x goes to the inactive state, all functions are blocked asserting a reset condition. This is useful to assure the correct device operation during the power-up and power-down. POR sequence is illustrated in Figure 28: after the start of two LDOs and internal PowerOK signals are asserted, the analog block first and the digital block after start the processing. Table 11. Clock tree CLK name Name Typical value Description Input clock CLKIN 16 MHz External clock Master clock MCLK 4 MHz Master root clock Analog sampling clock SCLK 4 MHz OSF of sigma-delta modulators Decimated clock DCLK 7.8125 kHz Sampling frequency of instantaneous voltage and current values CLKIN/XTAL2 XTAL1 CLKOUT/ZCR CLKIN/XTAL2 XTAL1 CLKOUT/ZCR 15 pF 15 pF 1MΩ CLKIN/XTAL2 XTAL1 CLKOUT/ZCR GIPG2503141257LM |
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