Figure 5. Typical startup sequence (EN toggled during input voltage rise)

5V UVLO

12V UVLO

100µs

_

_

_

_

EN

SATAI

G

VIN Rails

VOUT_Rails

VIN_5

VIN_12

VOUT_12

VOUT_5

Soft-start

6.3

Enable pin and SATA ignore function

The device provides an SAS-compliant chip disable pin (EN). This pin is internally pulled down to GND via a 3.3

MΩ resistor. If the pin is left floating, the device outputs are turned on. Apply an external signal above VIH to turn

the device off.

Additionally, a SATA ignore logic can be activated via the SATAIG pin.

This function allows to configure the device for working on either SAS or SATA interfaces by propagating or

ignoring the connector’s SAS_DISABLE signal, usually connected to the EN pin.

We recommend driving the SATAIG pin via an open drain.

Internal pullup of the SATAIG pin is activated when at least one of the two input voltages has reached an internal

threshold of around 3 V.

With reference to Figure 6 and Table 7, when SATAIG is left floating at startup, the SAS_DISABLE signal present

on the EN pin is propagated to the eFuse and the internal SATA_ig latched signal is latched.

This means that the EN pin controls device startup and shutdown and any successive SATAIG toggling is ignored.

If SATAIG is connected to GND before power-up, the SAS_DISABLE signal is ignored, so as soon as the input

voltage of both channels is higher than the UVLO thresholds, the device is turned on, regardless of the EN pin

status.

Figure 6. SATA ignore function simplified diagram

S

R

Q

SATA Ig Latched

SAS Disable

SATA Ignore

5V/12V

UVLO

Table 7. Enable/SATAIG pins truth table

EN

SATAIG

Device status

H

floating

Off

L or floating

floating

On

H

L

On

L or floating

L

On

The SATA_IG internal signal latch can be cleared only in case of a 5 V or 12 V UVLO event and it does not

change by toggling the SAS-disable signal (EN).

According to the above table and the internal pull-up configuration, if both EN and SATAIG pins are left floating,

the device is in ON status.

A typical startup sequence in this configuration is shown Figure 7.

STEF512SRI

Enable pin and SATA ignore function

DS14138 - Rev 1

page 9/28