5.8

Capacitive load and stability

Stability analysis must be performed for large capacitive loads over 100 pF. Increasing the load capacitance to

high values produces gain peaking in the frequency response, with overshoot and ringing in the step response.

Generally, unity gain configuration is the worst situation for stability and the ability to drive large capacitive loads.

For additional capacitive load drive capability in unity-gain configuration, stability can be improved by inserting

a small resistor RISO (10 Ω to 30 Ω) in series with the output. This resistor significantly reduces ringing while

maintaining DC performance for purely capacitive loads. However, if there is a resistive load in parallel with the

capacitive load, a voltage divider is created introducing a gain error on the output and slightly reducing the output

swing. The error introduced is proportional to the ratio RISO / RL. RISO modifies the maximum capacitive load

acceptable from a stability point-of-view as described in the following figure:

Figure 31. Stability criteria with a serial resistor at different capacitive loads

Figure 32. Test configuration for RISO

Please note that RISO = 30 Ω is sufficient to make the TSB512 stable whatever the capacitive load. However, for

high output currents, voltage drops across RISO should be considered.

TSB582

Capacitive load and stability

DS13378 - Rev 2

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