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HC05RC17GRS/D Datasheet(PDF) 74 Page - NXP Semiconductors

Part # HC05RC17GRS/D
Description  General Release Specification
PDF  128 Pages
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Manufacturer  NXP [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo NXP - NXP Semiconductors

HC05RC17GRS/D Datasheet(HTML) 74 Page - NXP Semiconductors

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Carrier Modulator Transmitter (CMT)
General Release Specification
MC68HC05RC17 — Rev. 2.0
Carrier Modulator Transmitter (CMT)
9.4.2 Carrier Generator Data Registers
The carrier generator contains two, 7-bit data registers: primary high
time (CHR1), primary low time (CLR1); and two, 6-bit data registers:
secondary high time (CHR2) and secondary low time (CLR2). Bit 7 of
CHR1 and CHR2 is used to read and write the IRO latch.
CHR1
Address: $0010
Bit 7
654321
Bit 0
Read:
IROLN
CMTPOL
PH5
PH4
PH3
PH2
PH1
PH0
Write:
Reset:
0
0
UUUUUU
U = Unaffected
CLR1
Address: $0011
Bit 7
654321
Bit 0
Read:
IROLP
0
PL5
PL4
PL3
PL2
PL1
PL0
Write:
Reset:
0
0
UUUUUU
U = Unaffected
CHR2
Address: $0012
Bit 7
654321
Bit 0
Read:
0
0
SH5
SH4
SH3
SH2
SH1
SH0
Write:
Reset:
0
0
UUUUUU
U = Unaffected
CLR2
Address: $0013
Bit 7
654321
Bit 0
Read:
0
0
SL5
SL4
SL3
SL2
SL1
SL0
Write:
Reset:
0
0
UUUUUU
U = Unaffected
Figure 9-3. Carrier Data Register (CHR1, CLR1, CHR2, and CLR2)
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com



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