PCF5271CVM100 datasheet(21/56 Pages) FREESCALE

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Design Recommendations

MCF5271 Integrated Microprocessor Hardware Specification, Rev. 1.2

Freescale Semiconductor

6.7.1.2

Address Multiplexing

Table 5 shows the generic address multiplexing scheme for SDRAM configurations. All possible address

connection configurations can be derived from this table.

Table 4. Synchronous DRAM Signal Connections

Signal

Description

SD_SRAS

Synchronous row address strobe. Indicates a valid SDRAM row address is present and can be

latched by the SDRAM. SD_SRAS should be connected to the corresponding SDRAM

SD_SRAS. Do not confuse SD_SRAS with the DRAM controller’s SD_CS[1:0], which should not

be interfaced to the SDRAM SD_SRAS signals.

SD_SCAS

Synchronous column address strobe. Indicates a valid column address is present and can be

latched by the SDRAM. SD_SCAS should be connected to the corresponding signal labeled

SD_SCAS on the SDRAM.

DRAMW

DRAM read/write. Asserted for write operations and negated for read operations.

SD_CS[1:0]

Row address strobe. Select each memory block of SDRAMs connected to the MCF5271. One

SD_CS signal selects one SDRAM block and connects to the corresponding CS signals.

SD_CKE

Synchronous DRAM clock enable. Connected directly to the CKE (clock enable) signal of

SDRAMs. Enables and disables the clock internal to SDRAM. When CKE is low, memory can

enter a power-down mode where operations are suspended or they can enter self-refresh mode.

SD_CKE functionality is controlled by DCR[COC]. For designs using external multiplexing,

setting COC allows SD_CKE to provide command-bit functionality.

BS[3:0]

Column address strobe. For synchronous operation, BS[3:0] function as byte enables to the

SDRAMs. They connect to the DQM signals (or mask qualifiers) of the SDRAMs.

CLKOUT

Bus clock output. Connects to the CLK input of SDRAMs.

Table 5. Generic Address Multiplexing Scheme

Address Pin Row Address Column Address

Notes Related to Port Sizes

8-bit port only

8- and 16-bit ports only

32-bit port only

16-bit port only or 32-bit port with only 8

column address lines

16-bit port only when at least 9 column

address lines are used

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