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PCF5271CVM100 Datasheet(PDF) 2 Page - Freescale Semiconductor, Inc |
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PCF5271CVM100 Datasheet(HTML) 2 Page - Freescale Semiconductor, Inc |
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2 / 56 page ![]() MCF5271 Integrated Microprocessor Hardware Specification, Rev. 1.2 MCF5271 Family Configurations Freescale Semiconductor 2 1 MCF5271 Family Configurations 2 Block Diagram The superset device in the MCF5271 family comes in a 196 mold array plastic ball grid array (MAPBGA) package. Figure 1 shows a top-level block diagram of the MCF5271. Table 1. MCF5271 Family Configurations Module 5270 5271 ColdFire V2 Core with EMAC and Hardware Divide xx System Clock 100 MHz Performance (Dhrystone/2.1 MIPS) 96 Instruction/Data Cache 8 Kbytes Static RAM (SRAM) 64 Kbytes Interrupt Controllers (INTC) 22 Edge Port Module (EPORT) xx External Interface Module (EIM) xx 4-channel Direct-Memory Access (DMA) xx SDRAM Controller xx Fast Ethernet Controller (FEC) xx Hardware Encryption —x Watchdog Timer (WDT) xx Four Periodic Interrupt Timers (PIT) xx 32-bit DMA Timers 44 QSPI xx UART(s) 33 I2C xx General Purpose I/O Module (GPIO) xx JTAG - IEEE 1149.1 Test Access Port xx Package 160 QFP, 196 MAPBGA 160 QFP, 196 MAPBGA |
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