| Electronic Components Datasheet Search |
|
M25P64-VMF6TP Datasheet(PDF) 17 Page - STMicroelectronics |
|
|
|||||||||||||||||||||||||||||
M25P64-VMF6TP Datasheet(HTML) 17 Page - STMicroelectronics |
|
17 / 49 page ![]() M25P64 Memory organization 17/49 5 Memory organization The memory is organized as: ● 8388608 bytes (8 bits each) ● 128 sectors (512Kbits, 65536 bytes each) ● 32768 pages (256 bytes each). Each page can be individually programmed (bits are programmed from 1 to 0). The device is Sector or Bulk Erasable (bits are erased from 0 to 1) but not Page Erasable. Figure 7. Block diagram AI08520B HOLD S W/VPP Control Logic High Voltage Generator I/O Shift Register Address Register and Counter 256 Byte Data Buffer 256 Bytes (Page Size) X Decoder Size of the read-only memory area C D Q Status Register 00000h 7FFFFFh 000FFh |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |