P83C524 datasheet(3/76 Pages) PHILIPS

3 / 76 page

1997 Dec 15

Philips Semiconductors

Product speciﬁcation

8-bit microcontrollers

P83C524; P80C528; P83C528

FEATURES

• 80C51 CPU

• 32 kbytes on-chip ROM, expandable externally to

64 kbytes Program Memory address space

• P83C524:

– 16 kbytes on-chip ROM, expandable externally from

32 kbytes to 64 kbytes Program Memory address

space (address space 16 k to 32 k not usable)

• P80C528:

– ROMless version of P83C528

• P83C528:

– 32 kbytes on-chip ROM, expandable externally from

32 kbytes to 64 kbytes Program Memory address

space

• EPROM versions are available: see separate data sheet

P87C524 and P87C528

• 512 bytes on-chip RAM, expandable externally to

64 kbytes Data Memory address space

• Four 8-bit I/O ports

• Full-duplex UART compatible with the standard 80C51

and the 8052

• Two standard 16-bit timer/counters

• An additional 16-bit timer (functionally equivalent to the

timer 2 of the 8052)

• On-chip Watchdog Timer (WDT) with an own oscillator

• Bit-level I2C-bus hardware serial I/O Port

• 7-source and 7-vector interrupt structure with 2 priority

levels

• Up to 3 external interrupt request inputs

• Two programmable power reduction modes (Idle and

Power-down)

• Termination of Idle mode by any interrupt, external or

WDT (watchdog) reset

• Wake-up from Power-down by external interrupt,

external or WDT reset

• ROM code protection

• XTAL frequency range: 3.5 MHz to 16 MHz and

3.5 MHz to 24 MHz

• All packaging pin-outs fully compatible to the standard

8051/8052.

GENERAL DESCRIPTION

The P83C524 and P83C528 single-chip 8-bit

microcontrollers are manufactured in an advanced CMOS

process and are derivatives of the PCB80C51

microcontroller family. These devices provide architectural

enhancements that make them applicable in a variety of

applications in general control systems, especially in those

systems which need a large ROM and RAM capacity on

chip.

The P83C524 and P83C528 contain a non-volatile

16 k

× 8 respectively 32 k × 8 read-only program memory,

a volatile 512 bytes

× 8 read/write data memory, four 8-bit

I/O ports, two 16-bit timer/event counters (identical to the

timers of the 80C51), a 16-bit timer (identical to the timer 2

of the 8052), a multi-source, two-priority-level, nested

interrupt structure, two serial interfaces (UART and

bit-level I2C-bus), a watchdog timer (WDT) with a separate

oscillator, an on-chip oscillator and timing circuits. For

systems that require extra capability, the P83C524 and

P83C528 can be expanded using standard TTL

compatible memories and logic.

The device also functions as an arithmetic processor

having facilities for both binary and BCD arithmetic plus

bit-handling capabilities. The P83C524 and P83C528

have the same instruction set as the PCB80C51 which

consists of over 100 instructions: 49 one-byte, 46 two-byte

and 16 three-byte. With a 16 MHz crystal, 58% of the

instructions are executed in 750 ns and 40% in 1.5

µs.

Multiply and divide instructions require 3

µs.

P83C524 Datasheet(PDF) 3 Page - NXP Semiconductors

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