P83C524 datasheet(31/76 Pages) PHILIPS

31 / 76 page

1997 Dec 15

Philips Semiconductors

Product speciﬁcation

8-bit microcontrollers

P83C524; P80C528; P83C528

12.1

Serial Port Control Register (SCON)

Table 12 Serial Port Control register (address 98H)

Table 13 Description of the SCON bits

12.2

SM0 and SM1 operating modes (SCON)

SCON bits SM0 and SM1 can operate in the following modes (see Table 14):

Table 14 SM0 and SM1 operating modes

76543210

SM0

SM1

SM2

REN

TB8

RB8

BIT

SYMBOL

FUNCTION

SM0

see Table 14.

SM1

see Table 14.

SM2

Enables the multiprocessor communication feature in Modes 2 and 3. In these

modes, if SM2 is set to 1 then RI will not be activated if the received 9th data bit (RB8) is

0. In Mode 1, if SM2 = 1, then RI will not be activated if a valid stop bit is not received. In

Mode 0, SM2 should be 0.

REN

Enables serial reception. Set and cleared by software as required.

TB8

9th data bit that will be transmitted in Modes 2 and 3. Set and cleared by software

as required.

RB8

In Modes 2 and 3, RB8 is the 9th data bit that is received. In Mode 1, if SM2 = 0,

RB8 is the stop bit that is received. In Mode 0, RB8 is not used.

1TI

Transmit interrupt ﬂag. It is set by hardware at the end of the 8th bit time in Mode 0, or

at the beginning of the stop bit in the other modes. TI must be cleared by software.

0RI

Receive interrupt ﬂag. It is set by hardware at the end of the 8th bit time in Mode 0, or

halfway through the stop bit time in the other modes (except: see SM2). RI must be

cleared by software.

MODE

SM0

SM1

DESCRIPTION

BAUD RATE

shift register

⁄12fOSC

8-bit UART

variable

9-bit UART

⁄32fOSC, 1⁄64fOSC

9-bit UART

variable

P83C524 Datasheet(PDF) 31 Page - NXP Semiconductors

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