IA88C00-PDW48I-R datasheet(75/80 Pages) INNOVASIC

75 / 80 page

IA88C00

Data Sheet

Microcontroller

As of Production Version -01

ENG21 1 030617-04

www.Innovasic

Innovasic.com

Innovasic Semiconductor

Page 75 of 80

1.888.824.4184

AC Electrical Characteristics (20 MHz)

EPROM Read Cycle

No.

Symbol

Parameter

Min

Max

Notes†*

TdA(DR)

Address Valid to Read Data Required Valid

170

NOTES

WAIT states add 167 ns to these times.

†

All times are in nanoseconds and are for 12 MHz input frequency.

Timings are preliminary and subject to change.

Wait Timing

SCLK

/AS

/DS

/WAIT

TWAIT

Figure 73. Wait Timing

Description

Skew of T1 SCLK Rise to /AS Fall

10.0

Max

Skew of T1 SCLK Rise to /AS Rise

10.0

Max

Skew of T2 SCLK Rise to Read /DS Fall

20.0

Max

Skew T2 SCLK Fall to Write /DS Fall

20.0

Max

Skew T3 SCLK Fall to /DS Rise

20.0

Max

/WAIT Fall Delay After T2 SCLK Fall to Generate at Least 1 WAIT State

20.0

Max

/WAIT Fall Delay after T2 SCLK Fall to Prevent an Additional WAIT State

15.0

Max

NOTES

All figures are in nanoseconds.

IA88C00-PDW48I-R Datasheet(PDF) 75 Page - InnovASIC, Inc

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