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TMS28F008AXY Datasheet(PDF) 16 Page - Texas Instruments |
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TMS28F008AXY Datasheet(HTML) 16 Page - Texas Instruments |
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16 / 52 page ![]() TMS28F008Axy,TMS28F800Axy 1 048 576 BY 8-BIT/524 288 BY 16-BIT AUTO-SELECT BOOT-BLOCK FLASH MEMORIES SMJS851A – NOVEMBER 1997 – REVISED MARCH 1998 16 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251–1443 byte-wide or word-wide mode selection The memory array is divided into two parts: an upper-half that outputs data through I/O pins DQ8–DQ15, and a lower-half that outputs data through DQ0–DQ7. Device operation in either byte-wide or word-wide mode is user-selectable and is determined by the logic state of BYTE. When BYTE is at a logic-high level, the device is in the word-wide mode and data is written to, or read from, I/O pins DQ0–DQ15. When BYTE is at a logic-low level, the device is in the byte-wide mode and data is written to or read from I/O pins DQ0–DQ7. In the byte-wide mode, I/O pins DQ8–DQ14 are placed in the high-impedance state and DQ15/A–1 becomes the low-order address pin and selects either the upper- or lower-half of the array. Array data from the upper half (DQ8–DQ15) and the lower half (DQ0–DQ7) are multiplexed to appear on DQ0–DQ7. Table 6 and Table 7 summarize operations for word-wide mode and byte-wide mode, respectively. Table 8 summarizes the operation for ’28F008Axy. Table 6. Operation Modes for Word-Wide Mode (BYTE = VIH) (’28F800Axy) (see Note 2) MODE WP CE OE RP WE A9 A0 VPP DQ0–DQ15 Read X VIL VIL VIH VIH X X X Data out X VIL VIL VIH VIH VID VIL X Manufacturer-equivalent code 0089h Algorithm-selection mode X VIL VIL VIH VIH VID VIH X Device-equivalent code 889Ch (top boot block) X VIL VIL VIH VIH VID VIH X Device-equivalent code 889Dh (bottom boot block) Output disable X VIL VIH VIH VIH X X X Hi-Z Standby X VIH X VIH X X X X Hi-Z Reset/deep power down X X X VIL X X X X Hi-Z Write (see Note 3) VIL or VIH VIL VIH VIH or VHH VIL X X VPPLor VPPH Data in Table 7. Operation Modes for Byte-Wide Mode (BYTE = VIL) (’28F800Axy) (see Note 2) MODE WP CE OE RP WE A9 A0 VPP DQ15/A–1 DQ8–DQ14 DQ0–DQ7 Read lower byte X VIL VIL VIH VIH X X X VIL Hi-Z Data out Read upper byte X VIL VIL VIH VIH X X X VIH Hi-Z Data out X VIL VIL VIH VIH VID VIL X X Hi-Z Manufacturer-equivalent code 89h Algorithm-selection Device-equivalent code g mode X VIL VIL VIH VIH VID VIH X X Hi Z q 9Ch (top boot block) X VIL VIL VIH VIH VID VIH X X Hi-Z Device-equivalent code 9Dh (bottom boot block) Output disable X VIL VIH VIH VIH X X X X Hi-Z Hi-Z Standby X VIH X VIH X X X X X Hi-Z Hi-Z Reset/deep power down X X X VIL X X X X X Hi-Z Hi-Z Write (see Note 3) VIL or VIH VIL VIH VIH or VHH VIL X X VPPL or VPPH X Hi-Z Data in NOTES: 2. X = don’t care 3. When writing commands to the ’28F008Axy and the ’28F800Axy, VPP must be in the appropriate VPP voltage range (as shown in the recommended operating conditions table for a specific product) for block-erase or program commands to be executed. Also, depending on the combination of RP and WP, the boot block can be secured and, therefore, is not programmable (see Table 2 for a list of the combinations). |
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