TMS28F008AXY datasheet(21/52 Pages) TI

21 / 52 page

TMS28F008Axy,TMS28F800Axy

1 048 576 BY 8-BIT/524 288 BY 16-BIT

AUTO-SELECT BOOT-BLOCK FLASH MEMORIES

SMJS851A – NOVEMBER 1997 – REVISED MARCH 1998

POST OFFICE BOX 1443

• HOUSTON, TEXAS 77251–1443

BUS

OPERATION

COMMAND

COMMENTS

Write

program

setup

Data = 40h or 10h

Addr = Address of

byte to be

programmed

Write

Write data

Data = Byte to be

programmed

Addr = Address of

byte to be

programmed

Read

Status-register data.

Toggle OE or CE to up-

date status register

Standby

Check SB7

1 = Ready, 0 = Busy

Repeat for subsequent bytes.

Write FFh after the last byte-programming operation to

reset the device to read-array mode

BUS

OPERATION

COMMAND

COMMENTS

Standby

Check SB3

1 = Detect VPP low

(see Note B)

Standby

Check SB4

1 = Byte-program error

(see Note C)

NOTES: A. Full status-register check can be done after each byte or after a sequence of bytes.

B. SB3 must be cleared before attempting additional program/erase operations.

C. SB4 is cleared only by the clear-status-register command, but it does not prevent additional program operation attempts.

Figure 3. Automated Byte-Programming Flow Chart

Start

Issue Program-Setup

Command and Byte Address

Issue Byte

Address/Data

SB7 = 1

Full Status-Register

Check (optional)

See Note A

Yes

Byte-Program Completed

FULL STATUS-REGISTER-CHECK FLOW

Read

Status-Register Bits

SB3 = 0

Yes

VPP Range Error

SB4 = 0

Yes

Byte-Program

Failed

Byte-Program Passed

Read Status-Register

Bits

TMS28F008AXY Datasheet(PDF) 21 Page - Texas Instruments

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