MPC8280 datasheet(11/1386 Pages) FREESCALE

11 / 1386 page

MPC8280 PowerQUICC II Family Reference Manual, Rev. 1

Freescale Semiconductor

Contents

Paragraph

Number

Title

Page

Number

5.1.4

SRESET Flow.............................................................................................................. 5-3

5.2

Reset Status Register (RSR) ............................................................................................ 5-4

5.3

Reset Mode Register (RMR) ........................................................................................... 5-5

5.4

Reset Configuration ......................................................................................................... 5-6

5.4.1

Hard Reset Configuration Word .................................................................................. 5-8

5.4.2

Hard Reset Configuration Examples ......................................................................... 5-10

5.4.2.1

Single MPC8280 with Default Configuration ....................................................... 5-10

5.4.2.2

Single MPC8280 Configured from Boot EPROM ................................................ 5-10

5.4.2.3

Multiple MPC8280s Configured from Boot EPROM ........................................... 5-11

5.4.2.4

Multiple MPC8280s in a System with No EPROM .............................................. 5-13

Part III

The Hardware Interface

Chapter 6

External Signals

6.1

Functional Pinout ............................................................................................................. 6-1

6.2

Signal Descriptions ..........................................................................................................6-2

Chapter 7

60x Signals

7.1

Signal Configuration........................................................................................................ 7-2

7.2

Signal Descriptions ..........................................................................................................7-2

7.2.1

Address Bus Arbitration Signals.................................................................................. 7-3

7.2.1.1

Bus Request (BR)—Output ..................................................................................... 7-3

7.2.1.1.1

Address Bus Request (BR)—Output ................................................................... 7-3

7.2.1.1.2

Address Bus Request (BR)—Input...................................................................... 7-3

7.2.1.2

Bus Grant (BG)........................................................................................................ 7-4

7.2.1.2.1

Bus Grant (BG)—Input ....................................................................................... 7-4

7.2.1.2.2

Bus Grant (BG)—Output..................................................................................... 7-4

7.2.1.3

Address Bus Busy (ABB)........................................................................................ 7-5

7.2.1.3.1

Address Bus Busy (ABB)—Output..................................................................... 7-5

7.2.1.3.2

Address Bus Busy (ABB)—Input ....................................................................... 7-5

7.2.2

Address Transfer Start Signal ...................................................................................... 7-5

7.2.2.1

Transfer Start (TS) ................................................................................................... 7-5

7.2.2.1.1

Transfer Start (TS)—Output ................................................................................ 7-5

7.2.2.2

Transfer Start (TS)—Input....................................................................................... 7-6

7.2.3

Address Transfer Signals ............................................................................................. 7-6

7.2.3.1

Address Bus (A[0–31])............................................................................................ 7-6

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